Integrated fibre channel fabric controller
First Claim
1. A fibre channel switch element, comprising:
- a plurality of ports to receive and transmit fibre channel frames; and
a fabric controller embedded on a same chip as the plurality of ports to configure and to initialize the fibre channel switch element, to configure the plurality of ports, to monitor the fibre channel switch element, to manage at least a link state machine and a loop state machine and to process name server requests, the embedded fabric controller comprising;
a processor module to control a plurality of switch element functions, wherein the processor module includes a core module, a trace module to trace program counters, a first cache to store program instructions and a second cache to enable data transfers;
a serializer/de-serializer to convert parallel data to serial data for transmission; and
to convert received serial data to parallel data;
a device control register (DCR) bus that transfers data between the processor module and a plurality of registers to configure a static dynamic random access memory (SDRAM) controller, an external bus controller and (EBC), an arbitration module, a universal interrupt controller, an Ethernet Controller and a real time clock module;
a processor local bus to access an external memory via the EBC;
an on-chip peripheral bus to allow communication between the processor module and at least one or more of a universal asynchronous receiver transmitter (UART) module, a general purpose input and output interface (GPIO), the Ethernet controller, a plurality of modules coupled to the processor local bus;
a bus that couples a control port of the fibre channel switch element to the processor local bus via a bridge;
a processor local bus andthe universal interrupt controller interfacing with the DCR bus provides interrupts to the processor module regarding control, status and communication between a plurality of the fibre channel switch element modules.
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Accused Products
Abstract
A fibre channel switch element with an integrated fabric controller on a single chip is provided. The fabric controller including a processor module that can control various switch element functions; a serlizer/de-serializer for converting parallel data to serial data for transmission; an on-chip peripheral bus that allows communication between plural components and the processor module; a processor local bus and an interrupt controller that provides interrupts to the processor module. The integrated fabric controller also includes a flash controller and an external memory controller; an Ethernet controller; a Universal Asynchronous Receiver Transmitter (“UART”) module that performs serial to parallel conversion and vice-versa; an I2C module that performs serial to parallel and parallel to serial conversion; a general-purpose input/output interface; a real time clock module; an interrupt controller that can receive interrupts inputs from both internal and external sources; and a bridge to an internal PCI bus.
189 Citations
19 Claims
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1. A fibre channel switch element, comprising:
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a plurality of ports to receive and transmit fibre channel frames; and a fabric controller embedded on a same chip as the plurality of ports to configure and to initialize the fibre channel switch element, to configure the plurality of ports, to monitor the fibre channel switch element, to manage at least a link state machine and a loop state machine and to process name server requests, the embedded fabric controller comprising; a processor module to control a plurality of switch element functions, wherein the processor module includes a core module, a trace module to trace program counters, a first cache to store program instructions and a second cache to enable data transfers; a serializer/de-serializer to convert parallel data to serial data for transmission; and
to convert received serial data to parallel data;a device control register (DCR) bus that transfers data between the processor module and a plurality of registers to configure a static dynamic random access memory (SDRAM) controller, an external bus controller and (EBC), an arbitration module, a universal interrupt controller, an Ethernet Controller and a real time clock module; a processor local bus to access an external memory via the EBC; an on-chip peripheral bus to allow communication between the processor module and at least one or more of a universal asynchronous receiver transmitter (UART) module, a general purpose input and output interface (GPIO), the Ethernet controller, a plurality of modules coupled to the processor local bus; a bus that couples a control port of the fibre channel switch element to the processor local bus via a bridge;
a processor local bus andthe universal interrupt controller interfacing with the DCR bus provides interrupts to the processor module regarding control, status and communication between a plurality of the fibre channel switch element modules. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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Specification