Memory card, nonvolatile semiconductor memory, and method of controlling semiconductor memory

• US 7,404,031 B2
• Filed: 08/02/2006
• Issued: 07/22/2008
• Est. Priority Date: 07/23/2004
• Status: Active Grant

• Current Assignee: Kioxia Corporation
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Oshima, Takashi
• Primary Examiner(s): LANE, JOHN A
• Application Number:
  US11/497,248
• Publication Number:
  US 20060271729A1
• Time in Patent Office: 720 Days
• Field of Search: 711/103, 711/115, 711/154, 711/156, 711/170, 711/173, 235/492
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory

Abstract

A nonvolatile semiconductor memory includes a storage area including of a plurality of data blocks and a management block which stores management information related to a storage medium in a lump. The storage area is divided into a plurality of areas and each area has a data block containing a particular page which stores information indicating whether or not the management block is present in the area.

Claims

1. A nonvolatile semiconductor memory comprising:

a storage area including of a plurality of data blocks and a management block which stores management information related to a storage medium in a lump; and

the storage area being divided into a plurality of areas and each area having a data block containing a particular page which stores information indicating whether or not the management block is present in the area.

2. The semiconductor memory according to claim 1, wherein the nonvolatile semiconductor memory is a NAND flash memory.

3. The semiconductor memory according to claim 1, wherein the nonvolatile semiconductor memory has a storage capacity of at least 1 Gbits.

4. The semiconductor memory according to claim 1, wherein the management block is provided in one of physical areas which has the highest robustness.

5. A memory card comprising:

a nonvolatile semiconductor memory having a storage area including a plurality of data blocks and a management block which stores management information related to the memory card in a lump;

a controller which retrieves the management block from the storage area;

the storage area in the nonvolatile semiconductor memory being divided into a plurality of areas and each area having a data block containing a particular page which stores information indicating whether or not the management block is present in the area; and

the controller retrieving the management block by referencing the particular page contained in each area.

6. The memory card according to claim 5, wherein the controller sequentially searches individual areas, and if an uppermost block in a search target area is not a bad block, the controller references the particular page in the uppermost block, and on the other hand, if the uppermost block in the search target area is the bad block, the controller references the particular page in a block which succeeds the bad block and which is not a bad block.

7. The memory card according to claim 5, wherein if all columns constituting the particular page have a value of 0, the management block is not present in an area to which the particular page belongs, and if at least one column has a value of 1, the management block is present in the area to which the particular page belongs.

8. The memory card according to claim 5, wherein the nonvolatile semiconductor memory is a NAND flash memory.

9. The memory card according to claim 5, wherein the nonvolatile semiconductor memory has a storage capacity of at least 1 Gbits.

10. The memory card according to claim 5, wherein the management block is provided in one of physical areas which has the highest robustness.

11. A method of controlling a semiconductor memory having a storage area including a plurality of data blocks and a management block which stores management information related to a storage medium in a lump, the method comprising:

sequentially searching individual areas constituting the storage area;

referencing a particular page in a block which is not a bad block in a search target area; and

determining, based on information indicated in the referenced particular page, whether or not the management block is present in an area to which the particular page belongs.

12. The method of controlling a semiconductor memory according to claim 11, wherein the determination includes determining that the management block is not present in the area to which the particular page belongs if all columns constituting the particular page have a value of 0, and determining that the management block is present in the area to which the particular page belongs if at least one column has a value of 1.

13. A method of controlling a semiconductor memory having a storage area including a plurality of data blocks and a management block which stores management information related to a storage medium in a lump, the method comprising:

sequentially searching individual areas constituting the storage area;

if an uppermost block in a search target area is not a bad block, referencing a particular page in the uppermost block, and on the other hand, if the uppermost block in the search target area is the bad block, referencing a particular page in a block which succeeds the bad block and which is not a bad block; and

determining, based on information indicated in the referenced particular page, whether or not the management block is present in an area to which the particular page belongs.

14. The method of controlling a semiconductor memory according to claim 13, wherein the determination includes determining that the management block is not present in the area to which the particular page belongs if all columns constituting the particular page have a value of 0, and determining that the management block is present in the area to which the particular page belongs if at least one column has a value of 1.