Method and apparatus for frequency synthesis in direct-conversion transmitters

• US 7,409,192 B2
• Filed: 07/21/2005
• Issued: 08/05/2008
• Est. Priority Date: 07/21/2005
• Status: Active Grant

• Current Assignee: Telefonaktiebolaget LM Ericsson
• Original Assignee: Telefonaktiebolaget LM Ericsson
• Inventors: Isberg, Martin, Lombardi, Frank, Freed, John G.
• Primary Examiner(s): LE, THANH C
• Application Number:
  US11/186,380
• Publication Number:
  US 20070019109A1
• Time in Patent Office: 1,111 Days
• Field of Search: None
• US Class Current: 455/112
• CPC Class Codes: H03C 3/0966 modulating the reference clock
• CPC Class Codes: H03C 3/0983 containing in the loop a mixer other than for phase detection
• CPC Class Codes: H03C 5/00 Amplitude modulation and angle modulation produced simultaneously or at will by the same modulating signal H03C7/00 takes precedence
• CPC Class Codes: H03L 7/185 using a mixer in the loop H03L7/187 - H03L7/195 take precedence
• CPC Class Codes: H03L 7/1974 for fractional frequency division
• CPC Class Codes: H03L 7/23 with pulse counters or frequency dividers
• CPC Class Codes: H04B 1/30 for homodyne or synchrodyne receivers demodulator circuits H03D1/22

Abstract

A method and apparatus for direct-conversion transmission generates a first frequency signal that is non-harmonically related to a transmit frequency signal, divides the first frequency signal to obtain a mixing frequency signal, divides the first frequency signal to obtain an intermediate frequency reference signal, generates the transmit frequency signal by using the mixing frequency signal to downconvert the transmit frequency signal into an intermediate frequency feedback signal, and phase-locks the intermediate frequency feedback signal to the intermediate frequency reference signal. The transmit frequency signal may be phase modulated, and may serve as an input to a saturated-mode power amplifier that can be configured for corresponding amplitude modulation. Alternatively, the un-modulated transmit frequency signal serves as the carrier signal input to a quadrature modulator, which imparts I/Q modulations to it, thereby producing a modulated carrier signal for input to a linear power amplifier.

Claims

1. A transmitter circuit comprising:

a first phase-locked loop configured to generate a first frequency signal that is non-harmonically related to a transmit frequency signal;

a first frequency divider configured to divide the first frequency signal to generate a mixing frequency signal for downconverting the transmit frequency signal into an intermediate frequency feedback signal;

a second frequency divider configured to generate an intermediate frequency reference signal by dividing the first frequency signal; and

a second phase-locked loop configured to generate the transmit frequency signal by phase-locking the intermediate frequency feedback signal to the intermediate frequency reference signal.

2. The transmitter circuit of claim 1, further comprising a quadrature modulator configured to generate a modulated carrier signal by modulating the transmit frequency signal responsive to I/Q modulation signals, and a power amplifier configured to generate an output signal by amplifying the modulated carrier signal.

3. The transmitter circuit of claim 2, wherein the power amplifier is configured to provide linear amplification of the modulated carrier signal.

4. The transmitter circuit of claim 2, wherein the quadrature modulator is configured to generate the modulated carrier signal by imparting desired phase modulations to the transmit frequency signal, and wherein the power amplifier comprises a saturated-mode amplifier circuit configured to generate the output signal by amplifying the modulated carrier signal.

5. The transmitter circuit of claim 4, further comprising an amplitude modulator configured to impart desired amplitude modulations to the output signal by amplitude-modulating a power supply signal of the saturated-mode amplifier circuit.

6. The transmitter circuit of claim 1, further comprising a phase modulator configured to impart desired phase modulations to the transmit frequency signal by phase-modulating one of the first frequency signal, the intermediate frequency feedback signal, or the intermediate frequency reference signal responsive to a phase modulation signal, and a saturated-mode power amplifier configured to generate an output signal by amplifying the transmit frequency signal.

7. The transmitter circuit of claim 6, further comprising an amplitude modulator configured to impart desired amplitude modulations to the output signal by amplitude-modulating a power supply signal of the saturated-mode power amplifier.

8. The transmitter circuit of claim 1, wherein the first phase-locked loop is configured to have a narrow loop bandwidth relative to a transmit frequency channel spacing, and the second phase-locked loop is configured to have a wide loop bandwidth relative to the first phase-locked loop.

9. The transmitter circuit of claim 1, wherein the second phase-locked loop includes a mixer configured to generate the intermediate frequency feedback signal by mixing the transmitter frequency signal and the mixing frequency signal, a phase detector configured to generate an error signal responsive to phase-comparing the intermediate frequency reference signal and the intermediate frequency feedback signal, or a filtered version of the intermediate frequency feedback signal, a loop filter configured to generate a control signal responsive to the error signal, and a Voltage Controlled Oscillator (VCO) configured to generate the transmitter frequency signal responsive to the control signal.

10. The transmitter circuit of claim 1, wherein at least one of the first and second frequency dividers comprise an adjustable frequency divider, allowing the selection of different intermediate frequencies in support of different desired transmit frequencies.

11. The transmitter circuit of claim 1, further comprising a memory circuit included in, or associated with, the transmitter, and storing a data table comprising one or more pairs of divisor values for the first and second frequency dividers, said one or more pairs of divisor values corresponding to one or more desired transmit frequencies in one or more desired transmit frequency bands.

12. The transmitter circuit of claim 1, wherein the transmitter circuit is configured to impart desired phase modulations to the transmit frequency signal in a first mode, and to impart desired phase and amplitude modulations to the transmit frequency signal in a second mode, and further comprising a dual-mode amplifier circuit configured to generate an output signal by providing saturated-mode amplification of the transmit frequency signal in the first mode, and by providing linear-mode amplification of the transmit frequency signal in the second mode.

13. A method of direct-conversion transmission comprising:

generating a first frequency signal that is non-harmonically related to a transmit frequency signal;

dividing the first frequency signal to obtain a mixing frequency signal;

dividing the first frequency signal to obtain an intermediate frequency reference signal; and

generating the transmit frequency signal by using the mixing frequency signal to downconvert the transmit frequency signal into an intermediate frequency feedback signal and phase-locking the intermediate frequency feedback signal to the intermediate frequency reference signal.

14. The method of claim 13, further comprising generating a modulated carrier signal by modulating the transmit frequency signal responsive to I/Q modulation signals, and generating an output signal by linearly amplifying the modulated carrier signal.

15. The method of claim 13, further imparting desired phase modulations to the transmit frequency signal by phase-modulating one of the first frequency signal, the intermediate frequency feedback signal, or the intermediate frequency reference signal responsive to a phase modulation signal, and generating an output signal by amplifying the transmit frequency signal using a saturated-mode power amplifier.

16. The method of claim 15, further comprising imparting desired amplitude modulations to the output signal by amplitude-modulating a power supply signal of the saturated-mode power amplifier.

17. The method of claim 13, wherein the first frequency signal is generated using a main channel synthesizer, and further comprising configuring the main channel synthesizer to have a narrow loop bandwidth relative to a transmit frequency channel spacing.

18. The method of claim 17, wherein the transmit frequency is generated using a translational phase-locked loop, and further comprising configuring the translational phase-locked loop to have a wide loop bandwidth relative to the main channel synthesizer.

19. The method of claim 13, further comprising varying as needed one or more divisor values used in generating at least one of the mixing frequency signal and the intermediate frequency reference signal to support different desired transmit frequencies.

20. The method of claim 19, further comprising selecting one or more stored divisor values as a function of changing transmit frequencies.

21. A wireless communication device including a transmitter circuit that comprises:

a first phase-locked loop configured to generate a first frequency signal that is non-harmonically related to a transmit frequency signal;

a first frequency divider configured to divide the first frequency signal to generate a mixing frequency signal for downconverting the transmit frequency signal into an intermediate frequency feedback signal;

a second frequency divider configured to generate an intermediate frequency reference signal by dividing the first frequency signal; and

a second phase-locked loop configured to generate the transmit frequency signal by phase-locking the intermediate frequency feedback signal to the intermediate frequency reference signal.