Transceiver with receive path overload protection and method

• US 7,409,197 B2
• Filed: 03/31/2005
• Issued: 08/05/2008
• Est. Priority Date: 03/31/2005
• Status: Expired due to Fees

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Posamentier, Joshua
• Primary Examiner(s): Nguyen, Duc M.
• Application Number:
  US11/096,195
• Publication Number:
  US 20060223451A1
• Time in Patent Office: 1,223 Days
• Field of Search: 455/193.1, 455/193.3, 455/249.1, 455/250.1, 455/340
• US Class Current: 455/193.1
• CPC Class Codes: H03F 1/52 Circuit arrangements for protecting such amplifiers monitoring arrangements G01R31/28; increasing reliability in communication systems, e.g. using redundancy H04B1/74
• CPC Class Codes: H03F 1/56 Modifications of input or output impedances, not otherwise provided for
• CPC Class Codes: H03F 2200/294 the amplifier being a low noise amplifier [LNA]
• CPC Class Codes: H03F 2200/372 Noise reduction and elimination in amplifier
• CPC Class Codes: H03F 2200/435 A peak detection being used in a signal measuring circuit in a controlling circuit of an amplifier
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H03G 3/3052 in bandpass amplifiers (H.F. or I.F.) or in frequency-changers used in a (super)heterodyne receiver H03G3/32, H03G3/34 take precedence
• CPC Class Codes: H04B 1/109 by improving strong signal performance of the receiver when strong unwanted signals are present at the receiver input

Abstract

A transceiver includes a detuning circuit to generate an impedance mismatch in a receive signal path in response to a control signal provided by loop-control circuitry. The loop-control circuitry generates the control signal based on a comparison of detected peak signal levels in the receive signal path. In this way, high-power input signal levels in the receive signal path may be reflected back to an input of the receiver due to the impedance mismatch.

Claims

1. A receiver comprising:

a detuning circuit to degrade signals in a receive signal path in response to a control signal;

loop-control circuitry to generate the control signal by a comparison of signal levels in the receive signal path;

a first peak detector to provide an input signal level output to the loop-control circuitry proportional to a peak level of an input signal in the receive signal path; and

a second peak detector to provide an output signal level output to the loop-control circuitry proportional to a peak level of an output signal in the receive signal path,

wherein the loop-control circuitry is to compare the input signal level output, the output signal level output and a desired output signal level in the receive signal path and is to responsively provide the control signal based on the comparison to maintain the output signal below a predetermined peak signal level.

2. The receiver of claim 1 wherein the detuning circuit is to generate an impedance mismatch in the receive signal path in response to the control signal, and wherein high-power input signal levels in the receive signal path are reflected back to an input of the receiver due to the impedance mismatch.

3. The receiver of claim 2 further comprising:

a first power tap in the receive signal path before the detuning circuit to provide a first coupled signal to the first peak detector proportional to the input signal; and

a second power tap in the receive signal path after the detuning circuit to provide a second coupled signal to the second peak detector proportional to the output signal.

4. The receiver of claim 2 wherein the loop-control circuitry comprises a proportional-integral-derivative controller.

5. The receiver of claim 2 wherein the detuning circuit comprises a field-effect transistor and wherein the control signal comprises a gate voltage.

6. The receiver of claim 2 wherein the detuning circuit comprises:

one or more varactors responsive to the control signal to generate the impedance mismatch;

one or more shunt resistors; and

switching circuitry responsive to the control signal to switch the one or more shunt resistors into the receive signal path, the one or more shunt resistors to attenuate high level input signals when the input signal level output exceeds a predetermined level.

7. A transceiver comprising:

a transmitter to generate signals for transmission; and

a receiver comprising;

a detuning circuit to degrade signals in a receive signal path in response to a control signal;

loop-control circuitry to generate the control signal by a comparison of signal levels in the receive signal path;

a first peak detector to provide an input signal level output to the loop-control circuitry proportional to a peak level of an input signal in the receive signal path; and

a second peak detector to provide an output signal level output to the loop-control circuitry proportional to a peak level of an output signal in the receive signal path,

wherein the loop-control circuitry is to compare the input signal level output, the output signal level output and a desired output signal level in the receive signal path and is to responsively provide the control signal based on the comparison to maintain the output signal below a predetermined peak signal level.

8. The transceiver of claim 7 wherein the detuning circuit is to generate an impedance mismatch in the receive signal path in response to the control signal, and

wherein high-power input signal levels in the receive signal path are reflected back to an input of the receiver due to the impedance mismatch.

9. The transceiver of claim 8 further comprising a duplexer for coupling the transmitter and the receiver with an antenna,

wherein the transceiver is part of a mobile handset.

10. The transceiver of claim 8 wherein the transceiver is to transmit and receive orthogonal frequency division multiplexed signals and is part of a wireless local area network communication station.

11. The transceiver of claim 8 wherein the transceiver is to transmit and receive orthogonal frequency division multiplex access signals and is part of a wireless broadband network communication station.

12. The transceiver of claim 8 wherein the transceiver is part of an ultra-wide band communication device and is to transmit and receive ultra-wide band communication signals.

13. The transceiver of claim 8 wherein the transceiver is part of a radio-frequency identification tag reader, the transmitter is coupled to a transmit antenna, and the receiver is coupled to a receive antenna,

wherein the receiver is to receive responses to interrogation signals for use in identifying an interrogated radio-frequency identification tag,

wherein the transceiver further comprises signal processing circuitry to generate the interrogation signals for transmission by the transmitter through the transmit antenna and to process the responses received through the receive signal path in response to the interrogation signals to determine an identifier of the interrogated radio-frequency identification tag.

14. A method of operating a receiver comprising:

comparing signal levels in a receive signal path;

responsively generating an impedance mismatch in the receive signal path based on the signal levels to reflect high-power input signal levels in the receive signal path back to an input of the receiver;

providing an input signal level output proportional to a peak level of an input signal in the receive signal path; and

providing an output signal level output proportional to a peak level of an output signal in the receive signal path,

wherein the comparing comprises comparing the input signal level output, the output signal level output and a desired output signal level in the receive signal path and

wherein the method includes responsively providing a control signal to generate the impedance mismatch based on the comparison to maintain the output signal below a predetermined peak signal level.

15. The method of claim 14 wherein the comparing is performed by a proportional-integral-derivative controller.

16. The method of claim 14 wherein generating an impedance mismatch comprises providing a gate voltage to a field-effect transistor.

17. The method of claim 14 wherein generating an impedance mismatch comprises providing the control signal to one or more varactors to generate the impedance mismatch.

18. The method of claim 17 further comprising switching one or more shunt resistors into the receive signal path, the one or more shunt resistors to attenuate higher-level input signals when the input signal level output exceeds a predetermined level.

19. A system comprising:

the receiver; and

at least one omnidirectional antenna coupled to the receiver,

wherein the receiver comprises;

a detuning circuit to generate an impedance mismatch in a receive signal path in response to a control signal;

loop-control circuitry to generate the control signal by a comparison of signal levels in the receive signal path, wherein high-power input signal levels in the receive signal path are reflected back to an input of the receiver due to the impedance mismatch;

a first peak detector to provide an input signal level output to the loop-control circuitry proportional to a peak level of an input signal in the receive signal path; and

a second peak detector to provide an output signal level output to the loop-control circuitry proportional to a peak level of an output signal in the receive signal path,

wherein the loop-control circuitry is to compare the input signal level output, the output signal level output and a desired output signal level in the receive signal path and is to responsively provide the control signal based on the comparison to maintain the output signal below a predetermined peak signal level.

20. The system of claim 19 wherein the detuning circuit comprises a field-effect transistor and wherein the control signal comprises a gate voltage.

21. The system of claim 19 wherein the detuning circuit comprises:

one or more varactors responsive to the control signal to generate the impedance mismatch;

one or more shunt resistors; and

switching circuitry responsive to the control signal to switch the one or more shunt resistors into the receive signal path, the one or more shunt resistors to attenuate high level input signals when the input signal level output exceeds a predetermined level.