Processor duplexing apparatus based on RTOS in mobile communication system and method thereof

• US 7,412,621 B2
• Filed: 12/04/2002
• Issued: 08/12/2008
• Est. Priority Date: 12/24/2001
• Status: Expired due to Fees

• Current Assignee: LG-Ericsson Company Limited (Telefonaktiebolaget LM Ericsson)
• Original Assignee: LG Nortel Company Limited (Telefonaktiebolaget LM Ericsson)
• Inventors: Choi, Woo-Young
• Primary Examiner(s): Puente; Emerson C
• Application Number:
  US10/309,163
• Publication Number:
  US 20030119475A1
• Time in Patent Office: 2,078 Days
• Field of Search: 714/10, 714/11
• US Class Current: 714/10
• CPC Class Codes: H04L 1/22 using redundant apparatus to increase reliability

Abstract

A processor duplexing method is applied to a 3G mobile communication system switching operation without involving application software. In this method, Real-Time operating system (RTOS) detects that a duplexing operation is being performed. While the duplexing switching operation is being performed, the RTOS and a PCI controlling unit dump a memory of an active board to a standby board, thereby synchronizing a memory between the active board and the standby board. Once the duplexing switching operation is complete, the standby board sequentially starts operation of the active board. In this method, duplexing of a processor level is performed without using application software in the RTOS. Instead, duplexing is a performed by a substructure (hardware and OS). As a result the burden of having the application software grow larger and more complicated is significantly reduced.

Claims

1. A processor duplexing apparatus in a mobile communication system, comprising:

an active board; and

a standby board, wherein the boards have a real time operating system (RTOS) which detects a need for and executes a dual switching operation, wherein each of the active board and the standby board includes;

a processor for loading the RTOS which performs a duplexing operation without intervention of application software;

a memory circuit to store at least one of programs or data required for system operation;

a PCI controlling circuit to directly access a memory of a self side board at a time of dual switching, and to dump contents of the memory of the self-side board to a memory of an opposing board;

an ethernet controller to transmit data between the self-side board and the opposing board through an ethernet channel; and

a duplexing control to prevent memory access collision between the self-side board and the opposing board.

2. The apparatus of claim 1, wherein the RTOS includes:

a fault detection unit for detecting a fault;

a fault management unit for classifying the fault;

a duplexing state management unit for managing a duplexing state and a state transition;

a fault recovery unit for recovering the fault by performing the dual switching operation when the classified fault requires dual switching; and

an interface unit for interfacing with a user.

3. The apparatus of claim 1, wherein information including a program counter and contents of at least one register is transmitted to the standby board at the time of dumping the memory of the active board.

4. The apparatus of claim 1, wherein the PCI controlling unit of the active board transmits the contents of the memory of the active board to the standby board through a PCI bus and performs back up operation when the RTOS of the active board requires dual switching.

5. The apparatus of claim 4, wherein the contents of the memory include data stored in a variable data region.

6. A RTOS for operating a processor duplexing apparatus in a mobile communication system, comprising:

a fault detection unit for detecting a fault;

a fault management unit for classifying the fault;

a duplexing state management unit for managing a duplexing state and state transition;

a fault recovery unit for recovering the fault by requiring switching for a duplexing operation when the classified fault corresponds to a predetermined type of fault; and

an interface block for interfacing with a user, wherein the duplexing operation is performed without intervention of application software, wherein the fault recovery unit;

determines whether a standby system is in a predetermined operating state, and

controls a PCI controlling unit in an active system in which the fault is detected to dump contents of a memory of the active system into a memory of the standby system, the contents of said memory dumped through a PCI bus coupled between the active and standby systems,

wherein if the standby system is not in said predetermined operating state, the fault recovery unit sends a command through an ethernet channel coupled between the active and standby systems to restart the standby system so that said memory dump can be performed.

7. The method of claim 6, wherein the fault recovery unit controls an ethernet controlling unit to replace operation of the PCI controlling unit when the fault occurs in the PCI bus or in the PCI controlling unit of the active system, the ethernet controlling unit dumping contents of the memory of the active system into the memory of the standby system through the ethernet channel.

8. A method for duplexing a processor based on RTOS in a mobile communication system, comprising:

detecting whether a dual switching operation between an active board and a standby board is required;

dumping a memory of the active board into a memory of the standby board if the dual switching operation is required; and

starting the standby board in order to succeed to an operation of the active board and resetting the active board, wherein dumping the memory includes;

directly accessing the memory of the active board without using a processor thereof;

transmitting contents of the accessed memory to the standby board through a PCI bus; and

copying the transmitted contents into the memory of the standby board, said method further comprising;

transmitting data between a self-side board and the opposing board through an ethernet channel; and

preventing memory access collision between the self-side board and the opposing board during the dual switching operation.

9. The method of claim 8, wherein a memory synchronization process is not performed when the active board is normally operated.

10. The method of claim 8, wherein information including at least one of a program counter and contents of a register is transmitted to the standby board at the time of dumping the memory.

11. The method of claim 8, wherein contents of the accessed memory include contents stored at a variable data region.

12. The method of claim 8, further comprising:

certifying whether the standby board is a normal state or not when requirement of dual switching operation is detected;

detecting whether a standby board is operating in a normal state;

transmitting a command through an Ethernet channel coupled between an active board and the standby board, said command commanding a restart to the standby board if the standby board is not in a normal state; and

starting the memory dump if the standby board is a normal state, and performing the memory dump through a PCI bus coupled between the active and standby boards after the standby board has been restarted.