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Method of manufacturing semiconductor device having recess gate structure with varying recess width for increased channel length

  • US 7,413,969 B2
  • Filed: 12/27/2005
  • Issued: 08/19/2008
  • Est. Priority Date: 06/30/2005
  • Status: Active Grant
First Claim
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1. A method of manufacturing a semiconductor device having a substrate with an active area defined by an isolation layer, the method comprising:

  • forming;

    an oxide layer or an insulation layer;

    a poly-silicon layer; and

    a reflection-proof layer on the active area of the semiconductor substrate;

    forming a mask pattern defining an expected substrate recess area on the reflection-proof layer;

    etching the reflection-proof layer, the poly-silicon layer, and the oxide layer or the insulation layer to expose the expected substrate recess area;

    first etching the substrate of the expected recess area to form a first recess having a first recess width and a first recess depth;

    removing the mask pattern and the reflection-proof layer;

    second etching the substrate at the bottom surface of the first recess by using the etched poly-silicon layer as an etching mask to form a second recess having a second recess width and a second recess depth, wherein the first recess width is wider than the second recess width;

    removing the poly-silicon layer and the oxide layer or the insulation layer; and

    forming a gate in the first and second recesses.

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