×

Semiconductor memory device

  • US 7,414,879 B2
  • Filed: 12/22/2005
  • Issued: 08/19/2008
  • Est. Priority Date: 10/21/2005
  • Status: Active Grant
First Claim
Patent Images

1. A semiconductor memory device comprising:

  • a memory cell block including a plurality of memory cells connected in series between first node and second node, the memory cells including a magnetoresistive element and a switching transistor, which are connected in parallel, the magnetoresistive element being a spin injection type and including a fixed layer whose magnetization direction is fixed, a recording layer whose magnetization direction changes, and a non-magnetic layer interposed between the fixed layer and the recording layer;

    a bit line connected to the first node via a selection transistor;

    a word line connected to a gate of the switching transistor;

    a write line connected to the second node; and

    a top electrode and bottom electrode provided via the magnetoresistive element,wherein the top electrode and the bottom electrode supply a current perpendicular to a plane to the magnetoresistive element, and the magnetization direction of the recording layer changes by spin-polarized electrons included in the current.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×