Die and wafer failure classification system and method
First Claim
Patent Images
1. A method for classifying failures of integrated circuit dies, comprising:
- analyzing failure data for each of a plurality of dies on a wafer with a plurality of failure classifiers to produce a corresponding plurality of failure classification results for each die, wherein the failure data for each die combines bin map failure data, electrical analysis data and physical failure data for the die; and
for the failure data for each die, analyzing the plurality of failure classification results to assign a particular one of a plurality of failure classifications to each die, wherein analyzing comprises analyzing the plurality of failure classification results with a preference towards assigning a wafer level failure classification to failure data for a die when any of the plurality of failure classification results indicates a presence of a wafer level failure.
5 Assignments
0 Petitions
Accused Products
Abstract
A system and method for classifying failures of semiconductor integrated circuit dies using a unique input vector created from die level characterization data to classify wafer (process related) and die level (defect related) patterns. The failure classification may then be used to assign the appropriate yield loss by die. The classification results produced by the plurality of classifiers are examined with a preference towards assigning a wafer level failure classification to failure data for a die when any of the plurality of failure classification results indicates a presence of a wafer level failure.
-
Citations
23 Claims
-
1. A method for classifying failures of integrated circuit dies, comprising:
-
analyzing failure data for each of a plurality of dies on a wafer with a plurality of failure classifiers to produce a corresponding plurality of failure classification results for each die, wherein the failure data for each die combines bin map failure data, electrical analysis data and physical failure data for the die; and for the failure data for each die, analyzing the plurality of failure classification results to assign a particular one of a plurality of failure classifications to each die, wherein analyzing comprises analyzing the plurality of failure classification results with a preference towards assigning a wafer level failure classification to failure data for a die when any of the plurality of failure classification results indicates a presence of a wafer level failure. - View Dependent Claims (2, 3)
-
-
4. A method for classifying failures of integrated circuit dies, comprising:
-
analyzing failure data for each of a plurality of dies on a wafer with a plurality of failure classifiers to produce a corresponding plurality of failure classification results for each die, wherein the failure data for each die combines bin map failure data, electrical analysis data and physical failure data for the die; and for the failure data for each die, analyzing the plurality of failure classification results to assign a particular one of a plurality of failure classifications to each die; counting the number of die assigned to each of the plurality of failure classifications; and computing a yield loss percentage for each of the plurality of failure classifications based on the number of die assigned to each of the plurality of failure classifications.
-
-
5. A method for classifying failures of integrated circuit dies, comprising:
-
analyzing failure data for each of a plurality of dies on a wafer with a plurality of failure classifiers to produce a corresponding plurality of failure classification results for each die, wherein the failure data for each die combines bin map failure data, electrical analysis data and physical failure data for the die; and for the failure data for each die, analyzing the plurality of failure classification results to assign a particular one of a plurality of failure classifications to each die, wherein analyzing comprises analyzing the failure data for each die with at least one die level classifier to produce a die level classification result and with at least one wafer level classifier to produce a wafer level classification result, and analyzing the die level classification result and the wafer level classification result with a preference towards assigning a wafer level failure classification to the failure data when the wafer level classification result indicates presence of a wafer level failure for the die regardless of the die level classification result for that die.
-
-
6. A method for classifying failures of integrated circuit dies, comprising:
-
analyzing failure data for each of a plurality of dies on a wafer with a plurality of failure classifiers to produce a corresponding plurality of failure classification results for each die, wherein the failure data for each die combines bin map failure data, electrical analysis data and physical failure data for the die; and for the failure data for each die, analyzing the plurality of failure classification results to assign a particular one of a plurality of failure classifications to each die, wherein analyzing comprises analyzing the failure data for each die with at least one die level classifier to produce a die level classification result and with at least one wafer level classifier to produce a wafer level classification result, wherein analyzing comprises analyzing the failure data for a die with a first die level classifier that analyzes data describing a spatial orientation of a failure density across a die, and analyzing the failure data for a die with a second die level classification that analyzes whether the die could not be sufficiently tested during wafer level testing.
-
-
7. A method for classifying failures of integrated circuit dies, comprising:
-
a. receiving a set of failure data for each of a plurality of integrated circuit dies, wherein the set of failure data for each die combines bin map failure data, electrical analysis failure data and physical failure data for the die; b. analyzing each set of failure data with a die level classifier to produce a die level classification result indicating the degree to which the failure data contains a die level failure; c. analyzing each set of failure data with a wafer level classifier to produce a wafer level classification result indicating the degree to which the failure data contains a wafer level failure; and d. for each set of failure data, analyzing the die level classification result and the wafer level classification result to assign a particular one of a plurality of failure classifications for each integrated circuit die. - View Dependent Claims (8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
-
-
18. A computer readable medium storing instructions, that when executed by a computer, cause the computer to classify failures of integrated circuit dies, comprising functions of:
-
a. receiving a set of failure data for each of a plurality of integrated circuit dies, wherein the set of failure data for each die combines bin map failure data, electrical analysis failure data and physical failure data for the die; b. analyzing each set of failure data with at least one die level classifier to produce a die level classification result indicating the degree to which the failure data contains a die level failure and with at least one wafer level classifier to produce a wafer level classification result indicating the degree to which the failure data contains a wafer level failure; and c. for each set of failure data, analyzing the die level classification result and the wafer level classification result to assign a particular one of a plurality of failure classifications for each integrated circuit die. - View Dependent Claims (19, 20)
-
-
21. A system for classifying failures of integrated circuit dies, comprising:
-
a. a computing device; b. a wafer level failure classification library that contains a plurality of wafer level failure classifications; c. a die level classification model that contains data used to classify failure data to one of a plurality of die level failure classifications; d. wherein the computing device, during an offline training phase;
analyzes a set of training failure data for each of a plurality of known failures determined for a plurality of semiconductor integrated circuit dies and for each set of training failure data assigns a wafer level classification to the set of training failure data when the set of training failure data indicates a wafer level failure and accordingly updates the wafer level classification library, and updates the die level classification model with die level failure classifications from sets of training failure data that do not indicate a wafer level failure; ande. wherein for a set of failure data for each of a plurality of integrated circuit dies whose failure classification is not yet known, the computing device; i. analyzes each set of failure data with the die level classification model to produce a die level classification result indicating the degree to which the failure data contains a die level failure; ii. analyzes each set of failure data with a wafer level classifier using the wafer level classification library to produce a wafer level classification result indicating the degree to which the failure data contains a wafer level failure; and iii. for each set of failure data, analyzing the die level classification result and the wafer level classification result to assign a particular one of a plurality of failure classifications for each integrated circuit die. - View Dependent Claims (22, 23)
-
Specification