Arrangement for testing a power output stage

• US 7,417,394 B2
• Filed: 11/09/2004
• Issued: 08/26/2008
• Est. Priority Date: 12/17/2003
• Status: Active Grant

• Current Assignee: Continental Automotive GmbH (Continental AG)
• Original Assignee: Siemens AG
• Inventors: Bay, Wolfgang, Henninger, Michael
• Primary Examiner(s): Patel; Rajnikant B
• Application Number:
  US10/583,497
• Publication Number:
  US 20070159180A1
• Time in Patent Office: 1,386 Days
• Field of Search: 318/138, 318/434, 318/801, 318/803, 318/432, 318/293, 318/439, 318/158, 318/159, 363/16, 363/37, 363/39, 363/41, 363/95, 363/98, 363/141, 330/2, 330/146, 330/251, 330/10
• US Class Current: 318/434
• CPC Class Codes: G01R 31/42 AC power supplies
• CPC Class Codes: H02H 11/005 in case of too low isolation resistance, too high load, short-circuit; earth fault
• CPC Class Codes: H02H 7/0838 with H-bridge circuit
• CPC Class Codes: H02P 29/0241 the fault being an overvoltage
• CPC Class Codes: H03K 17/0822 in field-effect transistor switches

Abstract

The invention concerns a device for controlling a final power-output stage, the latter comprising three half-bridges consisting respectively of a series circuit including an upper semiconductor switch and a lower semiconductor switch and subjected to a service voltage, the connection points of the semiconductor switches of the half-bridges forming outputs which are connected to the windings of a motor having at least three phases. The invention is characterized in that there is provided a control device for shifting on-state respectively one semiconductor switch or simultaneously several semiconductor switches according to a predetermined programme and for determining whether the respective voltages at the outputs are respectively within a predetermined tolerance range for the corresponding switching state.

Claims

1. An arrangement in a power output stage for testing the power output stage, said power output stage having at least three half-bridges, each of said half-bridges comprising a series circuit including an upper semiconductor switch and a lower semiconductor switch connected at a junction point forming an output, said power output stage further comprising means for applying an operating voltage to each of said at least three half-bridges and windings of an at least three phase motor connected to respective outputs of said at least three half-bridges, said arrangement comprising a control device connected to each of said upper and lower semiconductor switches and running a program, said control device arranged and dimensioned for switching one or a plurality of said upper and lower semiconductor switches to an on state according to a switching state defined by the program, said control device further connected to said outputs and arranged and dimensioned for testing whether the voltages at the respective outputs lie within predetermined tolerance ranges for the switching state, said arrangement further comprising further switches for interrupting feeds to said windings.

2. The arrangement of claim 1, wherein said windings are connected by a star connection, said further switches are arranged at said star connection and at feed lines between said outputs and said windings.

3. The arrangement of claim 1, wherein said further switches comprise relays.

4. The arrangement of claim 1, further comprising voltage dividers connected to each of said outputs and said means for applying the operating voltage, wherein said control device comprises window comparators connected, via said voltage dividers, to each of said outputs and to said means for applying the operating voltage.

5. The arrangement of claim 1, further comprising a device arranged and dimensioned for causing said output voltages to lie within respective predetermined average tolerance ranges when each of said upper and lower semiconductor switches is not in the on state and when the operating voltage is applied.

6. The arrangement of claim 4, further comprising a device arranged and dimensioned for causing said output voltages to lie within respective predetermined average tolerance ranges when each of said upper and lower semiconductor switches is not in the on state, said device comprising a resistor connected between said output of one of the half bridges and said means for applying an operating voltage, said resistor being arranged and dimensioned for generating, together with said voltage divider corresponding to said output of said one of said half bridges, a voltage in the average tolerance range.

7. The arrangement of claim 1, further comprising a controllable switch arranged between said means for applying said operating voltage and a terminal for receiving the operating voltage, and a resistor connected in parallel with said controllable switch, wherein said controllable switch is connected to said control device.