Electronic entertainment and communication system

• US 7,417,600 B2
• Filed: 05/18/2006
• Issued: 08/26/2008
• Est. Priority Date: 06/24/1993
• Status: Expired due to Fees

• Current Assignee: Nintendo Company Limited
• Original Assignee: Nintendo Company Limited
• Inventors: Nishizawa, Kenji, Smith, Darren C., Ravanpey, Ramin, McCarten, David J., Braun, Russell G.
• Primary Examiner(s): Tran; Henry N
• Application Number:
  US11/435,778
• Publication Number:
  US 20060208959A1
• Time in Patent Office: 831 Days
• Field of Search: 345/31, 345/55, 345/107, 345/204, 345/1.1, 345/2.1, 345/2.2, 345/240, 345/530, 345/543, 345/544, 345/564, 359/295, 359/296, 359/302, 347/111, 347/112, 347151-153, 430/19, 430/32, 430/41, 430/48, 348/8, 348/836, 348/837, 348/39, 463/1, 463/16, 463/40, 463/42, 711/1, 711/100, 711/170
• US Class Current: 345/2.1
• CPC Class Codes: A63F 13/31 Communication aspects specific to video games, e.g. between several handheld game devices at close range
• CPC Class Codes: A63F 13/338 using television networks
• CPC Class Codes: A63F 13/35 Details of game servers
• CPC Class Codes: A63F 13/355 Performing operations on behalf of clients with restricted processing capabilities, e.g. servers transform changing game scene into an encoded video stream for transmitting to a mobile phone or a thin client
• CPC Class Codes: A63F 13/77 involving data related to game devices or game servers, e.g. configuration data, software version or amount of memory
• CPC Class Codes: A63F 2300/209 characterized by low level software layer, relating to hardware management, e.g. Operating System, Application Programming Interface
• CPC Class Codes: A63F 2300/402 Communication between platforms, i.e. physical link to protocol
• CPC Class Codes: A63F 2300/409 Data transfer via television network
• CPC Class Codes: A63F 2300/50 characterized by details of game servers
• CPC Class Codes: A63F 2300/516 connected to a local network, e.g. in a plane, hotel
• CPC Class Codes: A63F 2300/538 for performing operations on behalf of the game client, e.g. rendering
• CPC Class Codes: A63F 2300/552 for downloading to client devices, e.g. using OS version, hardware or software profile of the client device
• CPC Class Codes: H04N 21/214 Specialised server platform, e.g. server located in an airplane, hotel, hospital arrangements specially adapted for local area broadcast systems H04H20/61
• CPC Class Codes: H04N 21/2143 located in a single building, e.g. hotel, hospital or museum arrangements specially adapted for plural spots in a confined site in broadcast systems H04H20/63; adaptations for transmission by electric cable for domestic distribution in television systems H04N7/106
• CPC Class Codes: H04N 21/2146 located in mass transportation means, e.g. aircraft, train or bus flight-deck installations for entertainment or communications B64D11/0015; arrangements specially adapted for transportation systems in broadcast systems H04H20/62; moving wireless networks H04W84/005

Abstract

A data processing system and method in which, by way of example, a memory system is coupled to a video game program processing system. The video game program processing system has a predetermined address space for executing programs stored in a program memory portion of the memory system. The contents of a plurality of storage locations determine a configuration of the memory system depending on which of a plurality of different game programs is to be executed by the video game program processing system.

Claims

1. A data processing system comprising:

a video game program processing system; and

a memory system coupled to the video game program processing system and comprising a volatile memory portion, a non-volatile memory portion and at least one register, a content of said at least one register determining a memory address mapping configuration of the memory system,

wherein the video game program processing system has a predetermined address space for storing or executing programs and storing program related information, and

wherein the video game program processing system is able to access and alter a content of said at least one register to effect a change in a memory address mapping of said volatile and non-volatile memory portions of the memory system within said predetermined address space, enabling execution of different game programs having differing memory address space usage requirements.

2. The data processing system according to claim 1, wherein the video game program processing system uses the volatile memory portion of the memory system for executing game programs.

3. The data processing system according to claim 1, wherein the video game program processing system uses the non-volatile memory portion of the memory system for storing video game program processing system status and/or game program status information.

4. The data processing system according to claim 1, wherein the memory system further comprises a ROM portion having a memory address mapping within said predetermined address space and the video game program processing system is able to effect a change in a memory address mapping of the ROM portion by altering a content of said at least one register.

5. The data processing system according to claim 4, wherein the memory system further comprises ROM control circuitry that generates a ROM chip select signal at an appropriate time to read data stored in the ROM portion of the memory system in response to address data received from the video game program processing system and a content of said at least one register.

6. The data processing system according to claim 1, wherein the memory system further comprises a scratch pad memory portion having a memory address mapping within said predetermined address space and the video game program processing system is able to effect a change in a memory address mapping of the scratch pad memory portion by altering a content of said at least one register.

7. The data processing system according to claim 6, wherein the memory system further comprises scratch-pad memory control circuitry that performs address mapping functions for the scratch-pad memory portion of the memory system in response to address data received from the video game program processing system and a content of said at least one register.

8. The data processing system according to claim 1, wherein the memory system further comprises a pseudo-static RAM portion having a memory address mapping within said predetermined address space and the video game program processing system is able to effect a change in a memory address mapping of the pseudo-static RAM portion by altering a content of said at least one register.

9. The data processing system according to claim 8, wherein the memory system further comprises pseudo-static RAM control circuitry that performs address mapping functions for the pseudo-static RAM portion of the memory system in response to address data received from the video game program processing system and a content of said at least one register.

10. The data processing system according to claim 1, wherein the video game program processing system sets a content of said at least one register to designate a particular mapping of the volatile memory portion of the memory system within said predetermined address space based upon identification information provided by a game program.

11. The data processing system according to claim 1, wherein the memory system further comprises volatile memory control circuitry that performs address mapping functions for the volatile memory portion in response to address data received from the video game program processing system and a content of said at least one register.

12. The data processing system according to claim 11, wherein the volatile memory portion of the memory system is mapped to a plurality of different memory address ranges within the predetermined address space of the memory system.

13. The data processing system according to claim 12, wherein the memory system further comprises non-volatile memory control circuitry that performs address mapping functions for the volatile memory portion in response to address data received from the video game program processing system and a content of said at least one register.

14. The data processing system according to claim 13, wherein the non-volatile memory portion of the memory system is mapped to a plurality of different memory address ranges within the predetermined address space of the memory system.

15. The data processing system according to claim 1, wherein the memory system further comprises an interface microcontroller that controls loading of program data and program related information into the volatile and non-volatile memory portions of the memory system.

16. A processing method for enabling a video game program processing system coupled to a memory system having a predetermined memory address space to process video game programs having differing predetermined memory address space usage requirements for execution, said memory system having at least one volatile memory portion, at least one non-volatile memory portion and at least one register for storing information identifying particular predetermined memory address space usage requirements associated with each of a plurality of different video game programs, the method comprising:

selecting one of a plurality of different video game programs having predetermined memory address space usage requirements for execution by said video game program processing system;

setting the contents of said at least one register in accordance with which one of the different video game programs is selected;

configuring the memory system, including mapping at least one volatile memory portion and at least one non-volatile memory portion to different specific memory address locations within the predetermined memory address space, in dependence on the contents of said at least one register; and

loading a selected video game program into at least the volatile memory portion for processing by the video game program processing system.

17. The method according to claim 16, wherein the video game program processing system is coupled to access the contents of said at least one register to effect a change in the memory address mapping of said volatile and non-volatile memory portions of the memory system within said predetermined address space.

18. The method according to claim 16, wherein the memory system includes a ROM portion having a memory address mapping within said predetermined address space and the video game program processing system is able to effect a change in the memory address mapping of the ROM portion by altering a content of said at least one register.

19. The method according to claim 16, wherein the memory system includes a scratch pad memory portion having a memory address mapping within said predetermined address space and the video game program processing system is able to effect a change in a memory address mapping of the scratch pad memory portion by altering a content of said at least one register.

20. The method according to claim 16, wherein the memory system includes a pseudo-static RAM portion having a memory address mapping within said predetermined address space and the video game program processing system is able to effect a change in a memory address mapping of the pseudo-static RAM portion by altering a content of said at least one register.