Frame length modulation and pulse position modulation system
First Claim
1. A system, comprising:
- a transceiver circuit to transceive signals representing at least a first analog signal and a digital signal;
a controller circuit, coupled to the transceiver circuit, to deliver at least one control signal thereto, the controller circuit including executable instructions defining a data frame for communication of the first analog signal and the digital signal, endpoints of the data frame defined byportions of successive first and second synchronization signals and defining a corresponding frame interval, the data frame including a first data band for transceiving a first data pulse therein, a relative position in time of the first data pulse representing the first analog signal, and a modulation of the frame interval representing the digital signal; and
an analog signal interface circuit, coupled to the transceiver circuit, to provide at least the first analog signal representative of acquired data.
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Accused Products
Abstract
A system includes a transceiver circuit to transceive at least a first analog signal and a digital signal. The system also includes a controller circuit, coupled to the transceiver circuit, to deliver at least one control signal thereto, the controller circuit including executable instructions defining a data frame for communication of the first analog signal and the digital signal, endpoints of the data frame defined by portions of successive first and second synchronization signals and defining a corresponding frame interval, the data frame including a first data band for transceiving a first data pulse therein. A relative position in time of the first data pulse represents the first analog signal, and a modulation of the frame interval represents the digital signal. The system further includes an analog signal interface circuit, coupled to the transceiver circuit, to provide at least the first analog signal representative of acquired data.
46 Citations
21 Claims
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1. A system, comprising:
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a transceiver circuit to transceive signals representing at least a first analog signal and a digital signal; a controller circuit, coupled to the transceiver circuit, to deliver at least one control signal thereto, the controller circuit including executable instructions defining a data frame for communication of the first analog signal and the digital signal, endpoints of the data frame defined byportions of successive first and second synchronization signals and defining a corresponding frame interval, the data frame including a first data band for transceiving a first data pulse therein, a relative position in time of the first data pulse representing the first analog signal, and a modulation of the frame interval representing the digital signal; and an analog signal interface circuit, coupled to the transceiver circuit, to provide at least the first analog signal representative of acquired data. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A system, comprising:
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a transceiver circuit to transceive signals representing at least a first analog signal and a digital signal; a controller circuit, coupled to the transceiver circuit, to deliver at least one control signal thereto, the controller circuit including executable instructions defining a data frame for communication of the first analog signal and the digital signal, endpoints of the data frame defined by portions of successive first and second synchronization signals and defining a corresponding frame interval, the data frame including a first data band for transceiving a first data pulse therein, a relative position in time of the first data pulse representing the first analog signal, and a modulation of the frame interval representing the digital signal, wherein the first and second synchronization signals each include first and second synchronization pulses defining endpoints of the first and second synchronization signals; a timer circuit to measure a duration of a synchronization interval defined by the first and second synchronization pulses; and a noise detection module, coupled to the timer, to determine the presence of noise based on a variability of the duration of a plurality of the synchronization intervals.
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Specification