Cmos imager for cellular applications and methods of using such

• US 7,420,602 B2
• Filed: 05/29/2002
• Issued: 09/02/2008
• Est. Priority Date: 05/29/2001
• Status: Expired due to Term

• Current Assignee: Transchip Israel Limited
• Original Assignee: Samsung Semiconductor Israel R&D Center Ltd. (Samsung Electronics Co. Ltd.)
• Inventors: Antsiferov, Ilia, Galambos, Tiberiu C., Elmakias, Yair, Furman, Ben, Fraenkel, Miriam, Voronov, German, Shnayder, Alexander
• Primary Examiner(s): Ho; Tuan
• Assistant Examiner(s): Le; Tuan H
• Application Number:
  US10/474,275
• Publication Number:
  US 20050231620A1
• Time in Patent Office: 2,288 Days
• Field of Search: 348/226.1, 348/227.1, 348/228.1, 348/294
• US Class Current: 348/294
• CPC Class Codes: H04N 11/20 Conversion of the manner in which the individual colour picture signal components are combined, e.g. conversion of colour television standards
• CPC Class Codes: H04N 17/002 for television cameras
• CPC Class Codes: H04N 23/70 Circuitry for compensating brightness variation in the scene
• CPC Class Codes: H04N 23/71 Circuitry for evaluating the brightness variation
• CPC Class Codes: H04N 23/73 by influencing the exposure time
• CPC Class Codes: H04N 23/745 Detection of flicker frequency or suppression of flicker wherein the flicker is caused by illumination, e.g. due to fluorescent tube illumination or pulsed LED illumination
• CPC Class Codes: H04N 25/63 applied to dark current
• CPC Class Codes: H04N 25/67 applied to fixed-pattern noise, e.g. non-uniformity of response
• CPC Class Codes: H04N 25/745 Circuitry for generating timing or clock signals
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 5/16 Circuitry for reinsertion of dc and slowly varying components of signal; Circuitry for preservation of black or white level
• CPC Class Codes: H04N 9/69 for modifying the colour signals by gamma correction controlling camera response for colour signals H04N23/83
• CPC Class Codes: H04N 9/73 Colour balance circuits, e.g. white balance circuits or colour temperature control camera processing pipelines for colour balance H04N23/88

Abstract

Systems, methods and devices related to detecting and transmitting images. Imaging systems and devices, as well as methods of using such that are provided herein include flicker detection and/or correction; and/or built-in self test associated with various analog circuitry in the imaging devices; and/or power reduction ability; and/or pixels with charge evacuation functionality; and/or a parallel to serial conversion unit and associated serial output interface; and/or other advanced functionality.

Claims

1. A CMOS imager, wherein the CMOS imager comprises:

an image sensor, wherein the image sensor includes one or more rows of pixels, and wherein each of the pixels provides a pixel value;

a storage element;

a summing circuit, wherein the summing circuit is operable to sum the pixel values for each of the one or more rows to create row sums, and to store the row sums to the storage element, wherein the row sums are created for each of a plurality of frames;

and a programmable core, wherein the programmable core includes instructions executable by the programmable core to;

determine a first energy value and a second energy value associated with the row sums for each of the plurality of frames;

calculate a variance between the first energy values across the plurality of frames;

calculate a variance between the second energy values across the plurality of frames;

compare the variance of the first energy values with the variance of the second energy values to estimate a flicker frequency; and

constrain an exposure duration associated with the image sensor to approximate a multiple of the flicker duration.

2. The CMOS imager of claim 1, wherein the instructions are further executable by the programmable core to:

compare the variance of the first energy values with the variance of the second energy values, wherein the larger is a greater variance; and

comparing the greater variance with a predefined threshold, wherein the constraining the exposure frequency is done when the greater variance is greater than the predefined threshold.

3. The CMOS imager of claim 2, wherein the CMOS imager further comprises:

a confidence counter, wherein the confidence counter is incremented whenever the estimated flicker frequency is approximately a first frequency, and decremented whenever the estimated flicker frequency is not approximately the first frequency.

4. The CMOS imager of claim 3, wherein the constraining the exposure frequency is done when the confidence counter changes its sign.

5. The CMOS imager of claim 1, wherein the CMOS imager further comprises:

an interrupt associated with the summing circuit, wherein assertion of the interrupt indicates that summing for the one or more rows of pixels is complete.

6. The CMOS imager of claim 5, wherein the instructions are further executable by the programmable core to receive the interrupt.

7. The CMOS imager of claim 6,

wherein the instructions are further executable by the programmable core to

determine if a sufficient number of frames have been received to calculate a variance between first energy values and a variance between second energy values.

8. The CMOS imager of claim 1, wherein determining the first energy value and the second energy value comprises calculating an exact Fourier component for the first energy value and for the second energy value.

9. A method for automatically detecting flicker in an imaging device, the method comprising:

providing an imaging device, wherein the imaging device includes an image sensor with two or more rows of pixels, and wherein each of the pixels provides a pixel value;

retrieving at least a portion of the two or more rows of pixels, and summing the pixel values to create a row sum for each of the rows of pixels for each of a plurality of frames;

determining a first energy value and a second energy value associate with the row sums for each of the plurality of frames;

calculating a variance between first energy values across the plurality of frames;

calculating a variance between second energy values across the plurality of frames;

and comparing the variance of the first energy values with the variance of the second energy values to estimate a flicker frequency.

10. The method of claim 9, the method further comprising:

constraining an exposure duration associated with the image sensor to approximate a multiple of the flicker frequency period.

11. The method of claim 9, wherein determining the first energy value and the second energy value comprises calculating an approximate Fourier component for the first energy and fro the second energy value.

12. The method of claim 9, the method further comprising:

comparing the variance of the first energy values with the variance of the second energy values, wherein the larger is a greater variance; and

comparing the greater variance with a predefined threshold, wherein the constraining the exposure duration is done when the greater variance is greater than the predefined threshold.

13. The method of claim 12, the method further comprising:

incrementing a confidence count whenever the estimated flicker frequency is approximately a first frequency, and

decrementing the confidence count whenever the estimated flicker frequency is not approximately the first frequency.

14. The method of claim 13, wherein the constraining the exposure duration is done when the confidence counter changes sign.

15. The method of claim 9, wherein the summing the pixel values to create a row sum for each of the rows of pixels for each of the frames is done by a summing circuit included in the imaging device, the method further comprising:

issuing an interrupt associated with the summing circuit, wherein the interrupt indicates that summing for the two or more rows of pixels is complete.

16. The method of claim 15, the method further comprising:

Receiving the interrupt, wherein determining the first and the second energy values for each of the frames is at least in part triggered by the interrupt.

17. An imaging device, wherein the imaging device comprises:

a pixel array, wherein the pixel array comprises a plurality of rows, wherein each of the plurality of rows comprises a plurality of pixels, and wherein each of the plurality of pixels provides a pixel value;

a summing circuit, wherein the summing circuit is operable to sum the pixel values for one or more of the plurality of rows to create row sums;

an interrupt associated with the summing circuit, wherein the interrupt indicates that summing is complete for one or more of the plurality of rows; and

a programmable core, wherein the programmable core includes instructions executable by the programmable core to;

receive the interrupt;

determine a first energy value and a second energy value associated with the row sums for each frame of a plurality of frames;

calculate a variance between first energy values across the plurality of frames;

calculate a variance between second energy values across the plurality of frames; and

compare the variance of the first energy values with the variance of the second energy values, wherein the larger is a greater variance.

18. The imaging device of claim 17, wherein the instructions are further executable by the programmable core to:

constrain the exposure duration to a multiple of the flicker frequency period.