Semiconductor device
First Claim
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1. A semiconductor device comprising:
- a power supply terminal;
a plurality of bit lines;
a plurality of source lines;
a memory array containing a plurality of memory cells;
a plurality of read circuits and a plurality of write circuits connected to said plurality of bit lines;
a power supply circuit which converts power fed to said power supply terminal, and supplies said power to internal circuits; and
a detect circuit which detects variations in power supply potential,wherein each of said plurality of memory cells has a storage element coupled to a corresponding bit line and a corresponding source line,wherein said storage element stores data according to changes in resistance and allows rewriting of the data by flowing electric current, andwherein said bit line and said source line are caused to be at a same potential when said detect circuit detects a variation in power supply potential.
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Abstract
To improve the reliability of the phase change element, unwanted current should not be flown into the element. Therefore, an object of the present invention is to provide a memory cell that stores information depending on a change in its state caused by applied heat, as well as an input/output circuit, and to turn off the word line until the power supply circuit is activated. According to the present invention, unwanted current flow to the element can be prevented and thereby data destruction can be prevented.
8 Citations
9 Claims
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1. A semiconductor device comprising:
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a power supply terminal; a plurality of bit lines; a plurality of source lines; a memory array containing a plurality of memory cells; a plurality of read circuits and a plurality of write circuits connected to said plurality of bit lines; a power supply circuit which converts power fed to said power supply terminal, and supplies said power to internal circuits; and a detect circuit which detects variations in power supply potential, wherein each of said plurality of memory cells has a storage element coupled to a corresponding bit line and a corresponding source line, wherein said storage element stores data according to changes in resistance and allows rewriting of the data by flowing electric current, and wherein said bit line and said source line are caused to be at a same potential when said detect circuit detects a variation in power supply potential. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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Specification