Parallel concatenated code with soft-in soft-out interactive turbo decoder

• US 7,421,034 B2
• Filed: 05/11/2004
• Issued: 09/02/2008
• Est. Priority Date: 09/12/2000
• Status: Expired due to Term

• Current Assignee: Broadcom Corporation (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Shen, Ba-Zhong, Jones, Christopher R., Tran, Hau Thien, Cameron, Kelly B., Hughes, Thomas Ashford Jr.
• Primary Examiner(s): WANG, TED M
• Application Number:
  US10/843,606
• Publication Number:
  US 20050015705A1
• Time in Patent Office: 1,575 Days
• Field of Search: 714/746, 714/701, 714/755, 375/295, 375/341, 375/262, 375/265
• US Class Current: 375/265
• CPC Class Codes: H03M 13/151 using error location or error correction polynomials
• CPC Class Codes: H03M 13/1515 Reed-Solomon codes
• CPC Class Codes: H03M 13/25 Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] modulation codes H03M13/31
• CPC Class Codes: H03M 13/258 with turbo codes, e.g. Turbo Trellis Coded Modulation [TTCM]
• CPC Class Codes: H03M 13/27 using interleaving techniques
• CPC Class Codes: H03M 13/2757 Interleaver with an interleaving rule not provided for in the subgroups H03M13/2703 - H03M13/2753
• CPC Class Codes: H03M 13/29 combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
• CPC Class Codes: H03M 13/2966 Turbo codes concatenated with another code, e.g. an outer block code
• CPC Class Codes: H03M 13/2978 Particular arrangement of the component decoders
• CPC Class Codes: H03M 13/3905 Maximum a posteriori probability [MAP] decoding or approximations thereof based on trellis or lattice decoding, e.g. forward-backward algorithm, log-MAP decoding, max-log-MAP decoding
• CPC Class Codes: H03M 13/3922 Add-Compare-Select [ACS] operation in forward or backward recursions
• CPC Class Codes: H03M 13/3927 Log-Likelihood Ratio [LLR] computation by combination of forward and backward metrics into LLRs
• CPC Class Codes: H03M 13/3972 using sliding window techniques or parallel windows
• CPC Class Codes: H03M 13/3988 for rate k/n convolutional codes, with k>1, obtained by convolutional encoders with k inputs and n outputs
• CPC Class Codes: H03M 13/4107 implementing add, compare, select [ACS] operations
• CPC Class Codes: H03M 13/6505 Memory efficient implementations
• CPC Class Codes: H03M 13/6561 Parallelized implementations
• CPC Class Codes: H04L 1/0041 Arrangements at the transmitter end
• CPC Class Codes: H04L 1/005 Iterative decoding, including iteration between signal detection and decoding operation
• CPC Class Codes: H04L 1/006 Trellis-coded modulation
• CPC Class Codes: H04L 1/0065 : Serial concatenated codes
• CPC Class Codes: H04L 1/0066 : Parallel concatenated codes
• CPC Class Codes: H04L 1/0068 : by puncturing
• CPC Class Codes: H04L 1/0071 : Use of interleaving interleaving per se H03M13/27

Abstract

A method for parallel concatenated (Turbo) encoding and decoding. Turbo encoders receive a sequence of input data tuples and encode them. The input sequence may correspond to a sequence of an original data source, or to an already coded data sequence such as provided by a Reed-Soloman encoder. A turbo encoder generally comprises two or more encoders separated by one or more interleavers. The input data tuples may be interleaved using a modulo scheme in which the interleaving is according to some method (such as block or random interleaving) with the added stipulation that the input tuples may be interleaved only to interleaved positions having the same modulo-N (where N is an integer) as they have in the input data sequence. If all the input tuples are encoded by all encoders then output tuples can be chosen sequentially from the encoders and no tuples will be missed. If the input tuples comprise multiple bits, the bits may be interleaved independently to interleaved positions having the same modulo-N and the same bit position. This may improve the robustness of the code. A first encoder may have no interleaver or all encoders may have interleavers, whether the input tuple bits are interleaved independently or not. Modulo type interleaving also allows decoding in parallel.

Claims

1. A method for parallel concatenated encoding an information signal, the method comprising:

turbo trellis encoding an information signal;

mapping the turbo trellis encoded information signal in a first mapper; and

concatenating the turbo trellis encoded information signal mapped in the first mapper with another signal mapped in a second mapper; and

wherein;

the turbo trellis encoding the information signal includes Separate Tuple (ST) modulo-N interleaving the information signal in a ST modulo-N interleaver, where N is greater than 2.

10. A method as in claim 1 wherein at least one of the first mapper and the second mapper employs a 16-QAM (Quadrature Amplitude Modulation) constellation.

11. A method as in claim 1 wherein:

the first mapper employs a first 8-PSK (Phase Shift Keying) constellation whose constellation points have a first mapping; and

the second mapper employs a second 8-PSK constellation whose constellation points have a second mapping.

2. A method as in 1 wherein the turbo trellis encoding an information signal comprises nonsystematically encoding the information signal in a constituent encoder.

3. A method as in 1 wherein the turbo trellis encoding an information signal comprises recursively encoding the information signal in a constituent encoder.

4. A method as in 1 wherein the turbo trellis encoding an information signal comprises convolutionally encoding the information signal in a constituent encoder.

5. A method as in 1 wherein the turbo trellis encoding the information signal employs a code rate of k/(k+1), where k is an integer.

6. A method as in 1 wherein the method is performed within a communication device.

7. A method as in 1 wherein the Separate Tuple (ST) modulo-N interleaving comprises ST even/odd interleaving.

8. A method as in 1 further comprising puncturing at least one bit of the turbo trellis encoded information signal before the turbo trellis encoded information signal undergoes mapping in the first mapper.

9. A method as in 1 wherein at least one of the first mapper and the second mapper employs an 8-PSK (Phase Shift Keying) constellation.

12. A method as in 1 wherein concatenating the turbo trellis encoded information signal mapped in the first mapper with the another signal mapped in the second mapper comprises:

puncturing a portion of the turbo trellis encoded information signal; and

mapping the punctured portion of the turbo trellis encoded information signal concatenated with a portion of the another information signal in the second mapper.

13. A method as in 1 wherein concatenating the turbo trellis encoded information signal mapped in the first mapper with the another signal mapped in the second mapper comprises:

puncturing a portion of the turbo trellis encoded information signal; and

mapping a portion of the turbo trellis encoded information signal in the second mapper.