Facilitating removal of sacrificial layers via implantation to form replacement metal gates

• US 7,422,936 B2
• Filed: 08/25/2004
• Issued: 09/09/2008
• Est. Priority Date: 08/25/2004
• Status: Expired due to Fees

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Barns, Chris E., Doczy, Mark L., Kavalieros, Jack, Brask, Justin K., Prince, Matt
• Primary Examiner(s): Smith; Zandra
• Assistant Examiner(s): Duong; Khanh B
• Application Number:
  US10/925,517
• Publication Number:
  US 20060046448A1
• Time in Patent Office: 1,476 Days
• Field of Search: None
• US Class Current: 438/183
• CPC Class Codes: H01L 21/28079 the final conductor layer next to the insulator being a single metal, e.g. Ta, W, Mo, Al
• CPC Class Codes: H01L 21/28185 with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
• CPC Class Codes: H01L 21/28194 by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition H01L21/28202 takes precedence
• CPC Class Codes: H01L 21/823842 gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
• CPC Class Codes: H01L 29/495 the conductor material next to the insulator being a simple metal, e.g. W, Mo H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/66545 using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
• CPC Class Codes: H01L 29/78 with field effect produced by an insulated gate H01L29/7725, H01L29/775, H01L29/778 take precedence

Abstract

Replacement metal gates may be formed by removing a polysilicon layer from a gate structure. The gate structure may be formed by patterning the polysilicon layer and depositing a spacer layer over the gate structure such that the spacer layer has a first polish rate. The spacer layer is then etched to form a sidewall spacer. An interlayer dielectric is applied over the gate structure with the sidewall spacer. The interlayer dielectric has a second polish rate higher than the first polish rate. A hard mask may also be applied over the gate structure and implanted so that the hard mask may be more readily removed.

Claims

1. A method comprising:

forming a sacrificial gate structure;

forming a hard mask over said sacrificial gate structure;

performing a first implant of said hard mask;

forming silicon nitride sidewall spacers around said hard mask;

performing a second implant to form lightly doped regions;

removing said hard mask by planarization without removing said spacers, said spacers acting as a polish stop;

removing said sacrificial gate structure; and

implanting said hard mask to make said hard mask easier to polish off.

2. The method of claim 1 including replacing said sacrificial gate structure with a metal gate structure.

3. The method of claim 1 including removing a sacrificial gate structure that includes polysilicon.

4. The method of claim 1 including removing said hard mask that includes silicon nitride.

5. The method of claim 1 including implanting said hard mask using germanium.

6. The method of claim 1 including implanting said hard mask to make it more easily removable by a wet etch process.

7. The method of claim 1 including covering said hard mask, exposing said covered hard mask, and implanting said exposed covered hard mask.

8. The method of claim 7 including covering said hard mask, planarizing said covered hard mask to expose said hard mask and implanting said planarized exposed hard mask.

9. A method comprising:

forming a sacrificial gate structure;

forming a hard mask over said sacrificial gate structure;

performing a first implant of said hard mask;

forming silicon nitride sidewall spacers around said hard mask;

performing a second implant to form lightly doped regions;

removing said hard mask by planarization without removing said spacers, said spacers acting as a polish stop;

removing said sacrificial gate structure; and

implanting said hard mask to make it more easily removable by a wet etch process.

10. The method of claim 9 including replacing said sacrificial gate structure with a metal gate structure.

11. The method of claim 9 including removing a sacrificial gate structure that includes polysilicon.

12. The method of claim 9 including removing said hard mask that includes silicon nitride.

13. The method of claim 9 including implanting said hard mask using germanium.

14. The method of claim 9 including covering said hard mask, exposing said covered hard mask, and implanting said exposed covered hard mask.

15. The method of claim 9 including covering said hard mask, planarizing said covered hard mask to expose said hard mask and implanting said planarized exposed hard mask.