Display panel driver unit

• US 7,425,961 B2
• Filed: 06/03/2005
• Issued: 09/16/2008
• Est. Priority Date: 06/03/2004
• Status: Expired due to Fees

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Tsukamoto, Akihito
• Primary Examiner(s): Tung; Kee M.
• Assistant Examiner(s): Chu; David H
• Application Number:
  US11/143,959
• Publication Number:
  US 20050280653A1
• Time in Patent Office: 1,201 Days
• Field of Search: 345531-533, 345/558, 345/560, 345/565, 345/545, 345/204, 345/571, 710/52, 710/57
• US Class Current: 345/533
• CPC Class Codes: G09G 5/001 Arbitration of resources in a display system, e.g. control of access to frame buffer by video controller and/or main processor
• CPC Class Codes: G09G 5/39 Control of the bit-mapped memory

Abstract

To provide an inexpensive display panel driver unit with a built-in memory, which is capable of achieving the same operation as that obtained in using a dual port memory by employing a single port RAM without reduction in an operation speed.

A reservation buffer 14 for storing an address and data in a memory writing is provided. When a display reading and a memory writing occurs simultaneously and row addresses of the memory writing and the display reading agree with each other, the memory writing is executed and also read data from addresses except a write address together with write data into the write address are used as data of the display reading. Also, when the row addresses of the memory writing and the display reading are different from each other, the write address and data are stored in the reservation buffer and also the display reading is executed. The similar mediation is applied in executing the reserved writing.

Claims

1. A display panel driver unit, having a built-in memory that is able to collectively read a row of memory cells at a plurality of addresses corresponding to the row, comprising:

a reservation buffer, storing a reservation, said reservation comprising a reserved write address and a reserved write data; and

a mediator, executing mediation between a memory writing, with a corresponding write address, writing row address, and write data, generated from a host device and a display reading, with a corresponding reading row address;

wherein,

the display panel driver unit is adapted to simultaneously receive the write data and output a row of read data,

when the display reading and the memory writing occur simultaneously and the writing row address is the same as the reading row address, the mediator executes the memory writing into the memory cells at the write address and also executes the display reading by reading the data from the memory cells at the reading row address except at the write address and using the write data as read data from the write address,

when the display reading and the memory writing occur simultaneously and the writing row address is different from the reading row address, the mediator stores the write address and the write data in the reservation buffer as a reservation and also executes the display reading,

when a memory writing occurs, a reservation is stored in the reservation buffer, the writing row address is the same as the row address corresponding to the reserved write address, and the reserved write address is not the same as the write address, the mediator in a collective operation stores the write data into the memory cells at the write address and stores the reserved write data into the memory cells at the reserved write address, and

when a display reading occurs and a reservation is stored in the reservation buffer, and the reading row address is the same as the row address corresponding to the reserved write address, the mediator stores the reserved write data into the memory cells at the reserved write address, and also executes the display reading by reading the data from the memory cells at the reading row address except at the write address and using the reserved write data as read data from the reserved write address.

2. The display panel driver unit according to claim 1, wherein the reservation buffer is constructed by a FIFO memory that stores the row address and a column address of the memory writing and the write data, and the row address of the display reading or the row address of the memory writing is compared with the row address being output from the FIFO memory to decide whether or not the write reservation is made.

3. The display panel driver unit according to claim 1, wherein the reservation buffer includes:

a register buffer, for inputting the row address of the display reading or the row address of the memory writing and then outputting a presence or absence of the write reservation; and

a reservation memory, for storing the column address of the memory writing and the write data by receiving the row address of the display reading or the row address of the memory writing as an input.

4. The display panel driver unit according to claim 1, wherein the memory includes memory cells arranged vertically and horizontally and designated by the row address and the column address, bit lines from which the data of the memory cells are read in response to the row address in the display reading and the memory writing, a precharge circuit for setting the bit lines to a fixed electric potential as occasion demands, a first bit-line driving circuit for driving the bit line of the memory cell having the column address in response to the memory writing occurred, and a second first bit-line driving circuit for driving the bit line of the memory cell having the column address in response to the memory writing for which the write reservation is made.