Adaptive Viterbi decoder for a wireless data network receiver

• US 7,426,249 B2
• Filed: 03/31/2006
• Issued: 09/16/2008
• Est. Priority Date: 03/19/2001
• Status: Expired due to Term

• Current Assignee: Cisco Technology, Inc. (Cisco Systems, Inc.)
• Original Assignee: Cisco Technology, Inc. (Cisco Systems, Inc.)
• Inventors: Ryan, Philip J., Keaney, Richard A., McDermott, Thomas
• Primary Examiner(s): Kim; Kevin
• Application Number:
  US11/278,239
• Publication Number:
  US 20060176968A1
• Time in Patent Office: 900 Days
• Field of Search: 375/341, 375/265, 714/795, 714/796
• US Class Current: 375/341
• CPC Class Codes: H03M 13/3961 Arrangements of methods for branch or transition metric calculation
• CPC Class Codes: H03M 13/41 using the Viterbi algorithm or Viterbi processors
• CPC Class Codes: H03M 13/4107 implementing add, compare, select [ACS] operations
• CPC Class Codes: H03M 13/4161 implementing path management
• CPC Class Codes: H03M 13/4184 using register-exchange H03M13/4192 takes precedence
• CPC Class Codes: H03M 13/6325 Error control coding in combination with demodulation
• CPC Class Codes: H03M 13/6362 by puncturing
• CPC Class Codes: H03M 13/6511 Support of multiple decoding rules, e.g. combined MAP and Viterbi decoding

Abstract

A configurable Viterbi decoder to decode a coded signal for inclusion in a radio receiver for implementing the physical layer receiving function (PHY) of a wireless data network. The decoder includes a branch metric generator with an input to the coded signal, an ACS subsystem coupled to the branch metric generator, and a survivor memory unit coupled to the ACS subsystem. The decoder includes a plurality of outputs each providing a decoded version of the input signal decoded to a distinct decision depth such that the Viterbi decoder is programmable to decode the signal to one of a plurality of decision depths.

Claims

1. An apparatus comprising:

a radio receiver configured to wirelessly receive radio signals determined from packets of OFDM data transmitted in a wireless network, each packet of OFDM data including one or more fields coded at a pre-defined relatively low data rate and including information on the data rate of the remainder of the packet, and the remainder of the packet coded at the data rate indicated in the one or more fields;

an analog-to-digital converter to provide digital samples; and

a receive signal path coupled to the analog-to-digital converter, the receive signal path includes a discrete Fourier transformer and a configurable Viterbi decoder, the decoder including;

a branch metric generator with an input accepting a coded signal and generating branch metrics;

an ACS subsystem coupled to and accepting the branch metrics from the metric generator;

a survivor memory subsystem coupled to and accepting input from the ACS subsystem, the survivor memory subsystem having a plurality of outputs, each providing a decoded version of the coded signal decoded to a distinct decision depth; and

such that the Viterbi decoder is able to decode the signal to one of a plurality of decision depths by selecting one of the memory unit outputs,

wherein the Viterbi decoder is first set to decode at the pre-defined relatively low data rate, and as a result of decoding the one or more fields is set to decode at the data rate of the remainder of the packet indicated in the one or more fields.

2. An apparatus as recited in claim 1, wherein the wireless network conforms to an IEEE 802.11 standard that uses OFDM.

3. An apparatus as recited in claim 1, wherein the survivor memory includes a plurality of registers in a register exchange architecture and wherein each of the survivor memory outputs is a tap to a different one of the registers.

4. An apparatus as recited in claim 3, wherein the survivor memory includes 128 registers to provide Viterbi decoding with a decision depth of up to 128 levels.

5. An apparatus as recited in claim 3, wherein the ACS subsystem includes a plurality of ACS units.

6. An apparatus as recited in claim 1, further comprising a selector having a select input and a selected signal output, the plurality of survivor memory outputs coupled to the selector, the selector selecting as the selected signal output one of the survivor memory outputs according to the select input, wherein the select input is initially set so that the survivor memory output corresponding to the a pre-defined relatively low data rate is selected, and is set as a result of decoding the one or more fields to select the survivor memory output corresponding to the data rate of the remainder of the packet indicated in the one or more fields.

7. An apparatus as recited in claim 1, wherein the survivor memory includes a plurality of registers in a register exchange architecture and wherein each of the survivor memory outputs is a tap to a different one of the registers such that only registers up to a particular tap are used to determine the decoded signal out of the particular tap, the decoder further comprising:

a selector accepting and responsive to a select input and producing a selected signal output, the plurality of register taps coupled to the selector, the selector selecting as the selected signal output one of the register output taps according to the select input; and

a switch accepting a clock signal and the select input, and having a set of clock outputs to the registers, the switch to selectively turn off the clock to those registers not being used to determine the decoded signal,

wherein the select input is initially set so that the survivor memory output corresponding to the a pre-defined relatively low data rate is selected, and is set as a result of decoding the one or more fields to select the survivor memory output corresponding to the data rate of the remainder of the packet indicated in the one or more fields.

8. An apparatus as recited in claim 1, implemented as part of a CMOS integrated circuit.

9. An adaptive Viterbi decoding system comprising:

a Viterbi decoder having a coded signal input configured to accept a coded OFDM signal received in a wireless receiver, the receiver configured to receive packets of information in a wireless network that uses OFDM, each packet having payload data coded at one or more of a set of data rates and modulated according to one of a set of modulation schemes, the packet having a packet structure that includes one or more header symbols containing information on the data rate and modulation scheme of the payload data, the header symbols encoded at a pre-defined first data rate and using a first modulation scheme;

a buffer preceding the Viterbi decoder having an output coupled to the coded signal input of the Viterbi decoder and of a length long enough to buffer input data while the decoder decodes the one or more header symbols,

the Viterbi decoder further comprising;

a branch metric generator with an input to the coded signal and generating branch metrics;

an ACS subsystem coupled to and accepting the branch metrics from the branch metric generator;

a survivor memory subsystem coupled to and accepting input from the ACS subsystem, the survivor memory subsystem having a plurality of outputs, each providing a decoded version of the coded input signal decoded to a distinct decision depth,

wherein the Viterbi decoder is programmable to decode the input signal to one of a plurality of decision depths by selecting one of the memory unit outputs,

wherein the Viterbi decoder is initially set to decode at the decision depth suitable for decoding the header symbols, and after the Viterbi decoder decodes the one or more header symbols and the data rate of the remainder of the received packet is determined from the one or more header symbols, the output of the Viterbi decoder is selected to be an output suitable for decoding the input signals at the determined data rate.

10. An apparatus as recited in claim 9, wherein the wireless network conforms to an IEEE 802.11 standard that uses OFDM.

11. An adaptive Viterbi decoding system comprising:

a Viterbi decoder having a coded signal input configured to accept a coded OFDM signal received in a wireless receiver, the receiver configured to receive packets of information in a wireless network that uses OFDM, each packet having payload data coded at one or more of a set of data rates and modulated according to one of a set of modulation schemes, the packet having a packet structure that includes one or more header symbols containing information on the data rate and modulation scheme of the payload data, the header symbols encoded at a pre-defined first data rate and using a first modulation scheme; and

a buffer preceding the Viterbi decoder having an output coupled to the coded signal input of the Viterbi decoder and of a length long enough to buffer input data while the decoder decodes the one or more header symbols,

the Viterbi decoder further comprising;

a branch metric generator with an input to the coded signal and generating branch metrics;

an ACS subsystem coupled to and accepting the branch metrics from the branch metric generator; and

a survivor memory subsystem coupled to and accepting input from the ACS subsystem, the survivor memory subsystem having a plurality of outputs, each providing a decoded version of the coded input signal decoded to a distinct decision depth,

wherein the Viterbi decoder is programmable to decode the input signal to one of a plurality of decision depths by selecting one of the memory unit outputs,

wherein the Viterbi decoder is initially set to decode at the decision depth suitable for decoding the header symbols, and after the Viterbi decoder decodes the one or more header symbols and the data rate of the remainder of the received packet is determined from the one or more header symbols, the output of the Viterbi decoder is selected to be an output suitable for decoding the input signals at the determined data rate.

12. An apparatus as recited in claim 11, wherein the wireless network conforms to an IEEE 802.11 standard that uses OFDM.

13. An adaptive Viterbi decoding system as recited in claim 11,

wherein the survivor memory subsystem includes a set of registers, the number of registers used for decoding dependent on the data rate of the to-be-decoded data, with fewer registers being used for relatively low data rates,

wherein the registers are clocked by a clock signal, and

wherein the clock signal to the registers in the survivor memory subsystem is selectively switched such that fewer registers are used such that only registers that are used to provide the output for a particular data rate are provided with a clock signal, and such that those registers not used are not supplied with a clock signal.

14. An adaptive Viterbi decoding system as recited in claim 11,

wherein the latency of the decoder is reduced during the decoding of the header symbols to relatively low latency compared to when decoding higher data-rate data.

15. An adaptive Viterbi decoding system as recited in claim 14,

wherein the survivor memory subsystem includes a set of registers, and wherein, after the header symbols are decoded, the registers are not reset, so that the output data is not valid until a pre-determined number of cycles.

16. An apparatus comprising:

an analog radio receiver for receiving signals that correspond to OFDM packets of a wireless network that uses OFDM, each packet having payload data coded at one or more of a set of data rates and modulated according to one of a set of modulation schemes, the packet having a packet structure that includes one or more header symbols coded at a pre-defined relatively low data rate and containing information on the data rate and modulation scheme of the payload data;

an analog-to-digital converter to convert the received signals corresponding to packet data from the analog radio receiver to digital samples; and

a digital receive signal path coupled to the output of the analog to digital converter and comprising;

a discrete Fourier transformer to transform the digital samples to coded signals; and

an adaptive Viterbi decoder to decode the coded signals, the Viterbi decoder including;

a branch metric generator with an input to the coded signal and generating branch metrics;

an ACS subsystem coupled to and accepting the branch metrics from the branch metric generator; and

a survivor memory subsystem coupled to and accepting input from the ACS subsystem, the survivor memory subsystem having a plurality of outputs, each providing a decoded version of the coded input signal decoded to a distinct decision depth such that the Viterbi decoder is programmable to decode the input signal to one of a plurality of decision depths,

wherein the Viterbi decoder is initially set to decode at the relatively low decision depth suitable for decoding the header symbols coded at the pre-defined relatively low data rate, such that during the decoding of the header symbols, the Viterbi decoder has a relatively low latency, and

wherein after the Viterbi decoder decodes the one or more header symbols and determines the data rate of the remainder of the received packet, the output of the Viterbi decoder is selected to be a survivor memory output suitable for decoding the input signals at the determined data rate.

17. An apparatus recited in claim 16, wherein the digital receive signal path further includes:

a buffer preceding the Viterbi decoder and having an output coupled to the coded signal input of the Viterbi decoder, the buffer having a length long enough to buffer input data while the decoder decodes the one or more header symbols.

18. A receiver as recited in claim 17, the receiver for receiving signals in a wireless local area network that conforms to an IEEE 802.11 standard that uses OFDM.

19. A receiver as recited in claim 17, wherein the full data depth is 128 levels.

20. A method comprising:

wirelessly receiving a data packet of a wireless network, the packet having payload data coded at one or more of a set of data rates and modulated according to one of a set of modulation schemes, the packet having a packet structure that includes one or more header symbols coded at a pre-defined relatively low data rate and containing information on the data rate and modulation scheme of the payload data, the method comprising;

sampling the received signal of the packet to form a sampled signal;

discrete Fourier transforming and demodulating the sampled signal to form a demodulated signal;

buffering the demodulated signal in a buffer of a length long enough to buffer input data while a decoder decodes the one or more header symbols;

initially setting an adaptive Viterbi decoder that has a number of settable decision levels corresponding to a corresponding number of data rates to a decision level corresponding to the pre-defined relatively low data rate, the Viterbi decoder having a latency that monotonically increases with the data rate, such that the Viterbi decoder initially is set to have a relatively low latency;

decoding the one or more header symbols in the adaptive Viterbi decoder;

determining the data rate of the remainder of the received packet from the one or more header symbols;

setting the Viterbi decoder to decode at a level suitable for the remainder of the packet; and

decoding the remainder of the packet.