System and method for selective memory module power management
First Claim
1. A memory system, comprising:
- a memory controller;
a memory bus operably coupled with the memory controller to communicate memory commands from the memory controller and communicate memory output signals to the memory controller; and
a plurality of memory modules operably coupled with the memory bus, the memory modules generating the memory output signals and responsive to the memory commands, at least some of the memory modules comprising;
an insulative substrate supporting a system interface;
a plurality of memory devices disposed on the insulative substrate;
a memory hub disposed on the insulative substrate and operably coupled with the memory devices and the system interface, the memory hub managing communications between the memory devices and the system interface in response to memory commands received via the system interface;
an activity sensing device monitoring activity of the memory module containing the activity sensing device in processing memory commands, the activity sensing device being operable to generate an output corresponding thereto; and
a module power controller coupled to the activity sensing device of the memory module containing the module power controller, the module power controller being operable to direct the memory devices in the memory module containing the module power controller to a reduced power state responsive to the output of the activity sensing device indicating activity of the memory module containing the module power controller is not of a desired level.
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0 Petitions
Accused Products
Abstract
A memory module includes a memory hub that monitors utilization of the memory module and directs devices of the memory module to a reduced power state when the module is not being used at a desired level. System utilization of the memory module is monitored by tracking system usage, manifested by read and write commands issued to the memory module, or by measuring temperature changes indicating a level of device activity beyond normal refresh activity. Alternatively, measured activity levels can be transmitted over a system bus to a centralized power management controller which, responsive to the activity level packets transmitted by remote memory modules, direct devices of those remote memory modules to a reduced power state. The centralized power management controller could be disposed on a master memory module or in a memory or system controller.
384 Citations
84 Claims
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1. A memory system, comprising:
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a memory controller; a memory bus operably coupled with the memory controller to communicate memory commands from the memory controller and communicate memory output signals to the memory controller; and a plurality of memory modules operably coupled with the memory bus, the memory modules generating the memory output signals and responsive to the memory commands, at least some of the memory modules comprising; an insulative substrate supporting a system interface; a plurality of memory devices disposed on the insulative substrate; a memory hub disposed on the insulative substrate and operably coupled with the memory devices and the system interface, the memory hub managing communications between the memory devices and the system interface in response to memory commands received via the system interface; an activity sensing device monitoring activity of the memory module containing the activity sensing device in processing memory commands, the activity sensing device being operable to generate an output corresponding thereto; and a module power controller coupled to the activity sensing device of the memory module containing the module power controller, the module power controller being operable to direct the memory devices in the memory module containing the module power controller to a reduced power state responsive to the output of the activity sensing device indicating activity of the memory module containing the module power controller is not of a desired level. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26)
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27. A computer system, comprising:
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a processor; an input device, operably connected to the processor, allowing data to be entered into the computer system; an output device, operably connected to the processor, allowing data to be output from the computer system; and a memory system, operably coupled with the processor, the memory system comprising; a memory controller; a memory bus operably coupled with the memory controller to communicate memory commands from the memory controller and communicate memory output signals to the memory controller; and a plurality of memory modules operably coupled with the memory bus, the memory modules generating the memory output signals and responsive to the memory commands, at least some of the memory modules comprising; an insulative substrate supporting a system interface; a plurality of memory devices disposed on the insulative substrate; a memory hub disposed on the insulative substrate and operably coupled with the memory devices and the system interface, the memory hub managing communications between the memory devices and the system interface in response to memory commands received via the system interface; an activity sensing device monitoring activity of the memory module containing the activity sensing device in processing memory commands, the activity sensing device being operable to generate an output corresponding thereto; and a module power controller coupled to the activity sensing device of the memory module containing the module power controller, the module power controller being operable to direct the memory devices in the memory module containing the module power controller to a reduced power state responsive to the output of the activity sensing device indicating activity of the memory module containing the module power controller is not of a desired level. - View Dependent Claims (28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52)
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53. A method of controlling power used in a plurality of memory modules associated with a system, each of the memory modules containing a plurality of memory devices, the method comprising:
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individually measuring activity in each of the memory modules in response to memory commands from the system in at least some of the memory modules; determining within each of the memory modules when each of the respective memory modules is inactive based on lack of activity in response to nonrefresh memory commands from the system measured in the respective memory modules; and internally directing the memory devices in at least one of the memory modules into a reduced power state when it is determined that activity of that memory module is not of a desired level. - View Dependent Claims (54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77)
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78. A memory system, comprising:
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a memory controller; a memory bus operably coupled with the memory controller to communicate memory commands from the memory controller and communicate memory output signals to the memory controller; and a plurality of memory modules operably coupled with the memory bus, the memory modules generating the memory output signals and responsive to the memory commands, at least some of the memory modules comprising; an insulative substrate supporting a system interface; a plurality of memory devices disposed on the insulative substrate; a memory hub disposed on the insulative substrate and operably coupled with the memory devices and the system interface, the memory hub managing communications between the memory devices and the system interface in response to memory commands received via the system interface; an activity sensing device monitoring activity of the memory module containing the activity sensing device in processing memory commands, the activity sensing device being operable to generate an output corresponding thereto; and a module power controller coupled to the activity sensing device of the memory module containing the module power controller, the module power controller being operable to direct the memory module containing the module power controller to a reduced power state responsive to the output of the activity sensing device indicating activity of the memory module containing the module power controller is not of a desired level, the module power controller being operable to direct the memory module containing the module power controller to a reduced power state by limiting the response of the memory module to memory commands. - View Dependent Claims (79)
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80. A computer system, comprising:
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a processor; an input device, operably connected to the processor, allowing data to be entered into the computer system; an output device, operably connected to the processor, allowing data to be output from the computer system; and a memory system, operably coupled with the processor, the memory system comprising; a memory controller; a memory bus operably coupled with the memory controller to communicate memory commands from the memory controller and communicate memory output signals to the memory controller; and a plurality of memory modules operably coupled with the memory bus, the memory modules generating the memory output signals and responsive to the memory commands, at least some of the memory modules comprising; an insulative substrate supporting a system interface; a plurality of memory devices disposed on the insulative substrate; a memory hub disposed on the insulative substrate and operably coupled with the memory devices and the system interface, the memory hub managing communications between the memory devices and the system interface in response to memory commands received via the system interface; an activity sensing device monitoring activity of the memory module containing the activity sensing device in processing memory commands, the activity sensing device being operable to generate an output corresponding thereto; and a module power controller coupled to the activity sensing device of the memory module containing the module power controller, the module power controller being operable to direct the memory module containing the module power controller to a reduced power state responsive to the output of the activity sensing device indicating activity of the memory module containing the module power controller is not of a desired level, the module power controller being operable to direct the memory module containing the module power controller to a reduced power state by limiting the response of the memory module to memory commands. - View Dependent Claims (81)
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82. A computer system, comprising:
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a processor; an input device, operably connected to the processor, allowing data to be entered into the computer system; an output device, operably connected to the processor, allowing data to be output from the computer system; and a memory system, operably coupled with the processor, the memory system comprising; a memory controller; a memory bus operably coupled with the memory controller to communicate memory commands from the memory controller and communicate memory output signals to the memory controller; and a plurality of memory modules operably coupled with the memory bus, the memory modules generating the memory output signals and responsive to the memory commands, at least some of the memory modules comprising; an insulative substrate supporting a system interface; a plurality of memory devices disposed on the insulative substrate; a memory hub disposed on the insulative substrate and operably coupled with the memory devices and the system interface, the memory hub managing communications between the memory devices and the system interface in response to memory commands received via the system interface; an activity sensing device monitoring monitors memory commands directed to the memory module, the activity sensing device being operable to generate an output corresponding to module activity based on the monitored memory commands; and a module power controller coupled to the activity sensing device of the memory module containing the module power controller, the module power controller being operable to direct the memory module containing the module power controller to a reduced power state responsive to the output of the activity sensing device indicating activity of the memory module containing the module power controller is not of a desired level. - View Dependent Claims (83, 84)
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Specification