Radio frequency identification (RFID) and programmable logic device (PLD) integration and applications

• US 7,429,926 B1
• Filed: 07/20/2005
• Issued: 09/30/2008
• Est. Priority Date: 07/20/2005
• Status: Active Grant

• Current Assignee: Xilinx, Inc. (Advanced Micro Devices, Inc.)
• Original Assignee: Xilinx, Inc. (Advanced Micro Devices, Inc.)
• Inventors: Drimer, Saar
• Primary Examiner(s): Nguyen; Hung T.
• Application Number:
  US11/185,257
• Time in Patent Office: 1,168 Days
• Field of Search: 340/572.1, 340/572.7, 340/572.8, 340/539.1, 340/505, 340/652, 340/653, 340/654, 340/10.51, 340/14.61, 340/568.2, 340/572.4, 235/375, 235/376, 235/385, 235/492, 455/418, 455/425
• US Class Current: 340/572.7
• CPC Class Codes: G06K 19/07749 the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
• CPC Class Codes: G06K 19/07758 arrangements for adhering the record carrier to further objects or living beings, functioning as an identification tag

Abstract

A Programmable Logic Device (PLD), such as a Field Programmable Gate Array (FPGA), is provided with components of a Radio Frequency Identification (RFID) tag and circuitry to enhance operation. The RFID antenna and circuitry is provided in either directly in layers of the die forming the PLD, on a die package containing the PLD die, or on a printed circuit board containing the PLD. An RFID antenna provides a source of power from an external electromagnetic radiation source (such as an RFID reader) during storage of the PLD to prevent loss of decryption software in volatile memory should batteries run down. The RFID antenna can further provide a path for providing a bitstream to program the PLD as well as to read data to verify programming. With multiple PLDs having RFID antennas, programming of the PLDs can be performed in parallel. Further, the RFID antenna can be used with limited PLD resources to identify the PLD for inventory.

Claims

1. An apparatus comprising:

a Programmable Logic Device (PLD);

a radio frequency identification (RFID) antenna connected to an input/output port of the PLD enabling wireless communication with the PLD, wherein the radio frequency identification antenna is formed by a plurality of interconnected metal layers embedded and is coupled to doped regions within a semiconductor die where the programmable logic device is formed; and

one or more vias extending between the plurality of interconnected metal layers and the doped regions to couple the radio frequency identification antenna to the semiconductor die.

2. The apparatus of claim 1, wherein wireless communication with the PLD is provided through the RFID antenna enabling communication through the RFID antenna without requiring power from another source.

3. The apparatus of claim 1, wherein the PLD comprises a Field Programmable Gate Array (FPGA).

4. The apparatus of claim 3, wherein the input/output port of the programmable logic device includes an input/output block of the field programmable gate array.

5. The apparatus of claim 4, wherein the radio frequency identification antenna is adapted to provide access to information stored within the field programmable gate array in response to an authentication challenge received by the radio frequency identification antenna.

6. The apparatus of claim 1 wherein when electromagnetic signals are provided from a reader to the RFID antenna, no further power is required by the PLD to enable communication with the PLD for purposes of identification.

7. The apparatus of claim 1, wherein the input/output port of the programmable logic device includes a power supply input pin of the programmable logic device.

8. The apparatus of claim 7, wherein the radio frequency identification antenna is adapted to receive electromagnetic energy from a source external to the programmable logic device, the radio frequency identification antenna being further adapted to provide operational power to the power supply input pin of the programmable logic device in response to receiving the electromagnetic energy.

9. The apparatus of claim 1, wherein the input/output port of the programmable logic device includes a configuration interface of the programmable logic device.

10. The apparatus of claim 9, wherein the radio frequency identification antenna is adapted to receive a programming bitstream through an electromagnetic field, the radio frequency identification antenna being further adapted to transfer the programming bitstream to the configuration interface in response to receiving the programming bitstream from the electromagnetic field.