Radio frequency identification (RFID) and programmable logic device (PLD) integration and applications
First Claim
1. An apparatus comprising:
- a Programmable Logic Device (PLD);
a radio frequency identification (RFID) antenna connected to an input/output port of the PLD enabling wireless communication with the PLD, wherein the radio frequency identification antenna is formed by a plurality of interconnected metal layers embedded and is coupled to doped regions within a semiconductor die where the programmable logic device is formed; and
one or more vias extending between the plurality of interconnected metal layers and the doped regions to couple the radio frequency identification antenna to the semiconductor die.
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Abstract
A Programmable Logic Device (PLD), such as a Field Programmable Gate Array (FPGA), is provided with components of a Radio Frequency Identification (RFID) tag and circuitry to enhance operation. The RFID antenna and circuitry is provided in either directly in layers of the die forming the PLD, on a die package containing the PLD die, or on a printed circuit board containing the PLD. An RFID antenna provides a source of power from an external electromagnetic radiation source (such as an RFID reader) during storage of the PLD to prevent loss of decryption software in volatile memory should batteries run down. The RFID antenna can further provide a path for providing a bitstream to program the PLD as well as to read data to verify programming. With multiple PLDs having RFID antennas, programming of the PLDs can be performed in parallel. Further, the RFID antenna can be used with limited PLD resources to identify the PLD for inventory.
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Citations
10 Claims
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1. An apparatus comprising:
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a Programmable Logic Device (PLD); a radio frequency identification (RFID) antenna connected to an input/output port of the PLD enabling wireless communication with the PLD, wherein the radio frequency identification antenna is formed by a plurality of interconnected metal layers embedded and is coupled to doped regions within a semiconductor die where the programmable logic device is formed; and one or more vias extending between the plurality of interconnected metal layers and the doped regions to couple the radio frequency identification antenna to the semiconductor die. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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Specification