Method of manufacturing semiconductor device

• US 7,432,147 B2
• Filed: 12/28/2005
• Issued: 10/07/2008
• Est. Priority Date: 12/28/2004
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Akasaka, Yasushi
• Primary Examiner(s): CHAUDHARI, CHANDRA P
• Application Number:
  US11/318,479
• Publication Number:
  US 20060166427A1
• Time in Patent Office: 1,014 Days
• Field of Search: 438/216, 438/228, 438/926, 257/E21.204, 257/E21.637
• US Class Current: 438/216
• CPC Class Codes: H01L 21/28088 the final conductor layer next to the insulator being a composite, e.g. TiN
• CPC Class Codes: H01L 21/823842 gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
• CPC Class Codes: H01L 21/823878 isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
• CPC Class Codes: H01L 29/4966 the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2 H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
• CPC Class Codes: H01L 29/66492 with a pocket or a lightly doped drain selectively formed at the side of the gate
• CPC Class Codes: H01L 29/66545 using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
• CPC Class Codes: H01L 29/66583 with initial gate mask or masking layer complementary to the prospective gate location, e.g. with dummy source and drain contacts
• CPC Class Codes: H01L 29/6659 with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
• CPC Class Codes: H01L 29/7833 with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's for thin film transistors H01L29/78618

Abstract

A method of manufacturing a semiconductor device comprises: forming a device isolation, a first conductivity type region, and a second conductivity type region on a semiconductor substrate; depositing a gate insulating film on an entire surface of the semiconductor substrate; forming a first metal film on the gate insulating film; forming a region of a second metal film so as to cover a region that forms a gate electrode of the first conductivity type region; removing the first metal film exposed outside the region of the second metal film by wet etching to expose the gate insulating film; forming a third metal film on the entire surface of the semiconductor substrate; depositing a protecting film on the third metal film; and patterning the first metal film, the second metal film, the third metal film, and the protecting film to form the gate electrode.

Claims

1. A method of manufacturing a semiconductor device comprising:

forming a device isolation, a first conductivity type region, and a second conductivity type region on a semiconductor substrate;

depositing a gate insulating film on the semiconductor substrate;

forming a first metal film on the gate insulating film;

forming a region of a second metal film so as to cover a region that forms a gate electrode of the first conductivity type region;

removing the first metal film exposed outside the region of the second metal film by wet etching to expose the gate insulating film;

forming a third metal film on the second metal film and on the exposed gate insulating film;

depositing a protecting film on the third metal film; and

patterning the first metal film, the second metal film, the third metal film, and the protecting film to form the gate electrode.

2. The method of manufacturing a semiconductor device according to claim 1, wherein the gate insulating film is an oxide containing at least one selected from the group consisting of Si, Hf, Zr, and Al.

3. The method of manufacturing a semiconductor device according to claim 2, wherein the gate insulating film contains nitrogen.

4. The method of manufacturing a semiconductor device according to claim 3, wherein the nitrogen has a concentration distribution being lower on the substrate side.

5. The method of manufacturing a semiconductor device according to claim 1, wherein the gate insulating film is any one selected from the group consisting of SiO_xN_y, HfSiO_x, HfO_x, and HfAl_xO_y.

6. The method of manufacturing a semiconductor device according to claim 1, wherein the first metal film comprises at least one selected from the group consisting of TiN_x, Mo, MoN_x, W, and WN_x.

7. The method of manufacturing a semiconductor device according to claim 1, wherein the second metal film includes at least one selected from the group consisting of Ta, TaN_x, V, VN_x, Nb, NbN_x, TiSi_x, HfSi_x, ZrSi_x, VSi_x, NbSi_x, TaSi_x, WSi_x, and MoSi_x.

8. The method of manufacturing a semiconductor device according to claim 1, wherein etching liquid used in the wet etching includes H₂O₂.

9. The method of manufacturing a semiconductor device according to claim 1, wherein etching liquid used in the wet etching is an aqueous solution of H₂O₂.

10. The method of manufacturing a semiconductor device according to claim 1, wherein etching liquid used in the wet etching is any one of a liquid mixture of H₂O₂ and H₂SO₄, a liquid mixture of H₂O₂ and HCl, and a liquid mixture of H₂O₂, HN₃, and H₂O.

11. A method of manufacturing a semiconductor device comprising:

forming a device isolation;

a first conductivity type region, and a second conductivity type region on a semiconductor substrate;

forming a first dummy gate in a region that forms a gate electrode of the first conductivity type and a second dummy gate in a region that forms a gate electrode of the second conductivity type on the semiconductor substrate;

forming gate sidewalls made of insulator on both sides of the first and second dummy gates;

covering the region other than the first and second dummy gates on the semiconductor substrate;

selectively removing the first and second dummy gates with the gate insulating film and the gate sidewalls being covered;

forming a gate insulating film on a surface of the semiconductor substrate exposed by removal of the first and second dummy gates;

forming a first metal film on the gate insulating film;

forming a second metal film on the first metal film;

removing the second metal film in the region having the second dummy gate formed therein while the second metal film is covered in the region having the first dummy gate formed therein;

removing, by wet etching, the first metal film in the region having the second dummy gate formed therein while the first metal film is covered thereon with the second metal film in the region having the first dummy gate formed therein, thereby exposing the gate insulating film;

forming a third metal film at least on the gate insulating film exposed in the region having the second dummy gate formed therein; and

removing the first metal film, the second metal film and the third metal film except the regions having the first and second dummy gates formed therein.

12. The method of manufacturing a semiconductor device according to claim 11, wherein the gate insulating film is an oxide containing at least one selected from the group consisting of Si, Hf, Zr, and Al.

13. The method of manufacturing a semiconductor device according to claim 11, wherein the first metal film comprises TiN_x.

14. The method of manufacturing a semiconductor device according to claim 11, wherein the second metal film includes at least one selected from the group consisting of Ta, TaN_x, V, VN_x, Nb, NbN_x, TiSi_x, HfSi_x, ZrSi_x, VSi_x, NbSi_x, TaSi_x, WSi_x, and MoSi_x.

15. The method of manufacturing a semiconductor device according to claim 11, wherein etching liquid used in the wet etching is any one of an aqueous solution of H₂O₂, a liquid mixture of H₂O₂ and H₂SO₄, a liquid mixture of H₂O₂ and HCl, and a liquid mixture of H₂O₂, HN₃, and H₂O.

16. A method of manufacturing a semiconductor device including a semiconductor layer having a first conductivity type region and a second conductivity type region formed therein, a gate insulating film formed on the semiconductor layer, a first gate electrode provided on the gate insulating film in the first conductivity type region, and a second gate electrode provided on the gate insulating film in the second conductivity type region,

the first gate electrode having a first metal film provided on the gate insulating film and a second metal film provided on the first metal film, and

the second gate electrode having a third metal film provided on the gate insulating film,

the method comprising:

forming the first metal film on the gate insulating film;

removing, by wet etching, the first metal film in the region where the second gate electrode is formed while the first metal film is covered with the second metal film in the region where the first gate electrode is formed; and

forming a third metal film at least in the region where the second gate electrode is formed.

17. The method of manufacturing a semiconductor device according to claim 16, wherein the gate insulating film is an oxide containing at least one selected from the group consisting of Si, Hf, Zr, and Al.

18. The method of manufacturing a semiconductor device according to claim 16, wherein the first metal film comprises at least one selected from the group consisting of TiN_x, Mo, MoN_x, W, and WN_x.

19. The method of manufacturing a semiconductor device according to claim 16, wherein the second metal film includes at least one selected from the group consisting of Ta, TaN_x, V, VN_x, Nb, NbN_x, TiSi_x, HfSi_x, ZrSi_x, VSi_x, NbSi_x, TaSi_x, WSi_x, and MoSi_x.

20. The method of manufacturing a semiconductor device according to claim 16, wherein etching liquid used in the wet etching is any one of an aqueous solution of H₂O₂, a liquid mixture of H₂O₂ and H₂SO₄, a liquid mixture of H₂O₂ and HCl, and a liquid mixture of H₂O₂, HN₃, and H₂O.