Methods of forming a nitrogen enriched region

• US 7,432,166 B2
• Filed: 01/15/2002
• Issued: 10/07/2008
• Est. Priority Date: 08/07/2000
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Sandhu, Gurtej S., Rueger, Neal R., Moore, John T.
• Primary Examiner(s): MENZ, LAURA MARY
• Application Number:
  US10/050,373
• Publication Number:
  US 20020094621A1
• Time in Patent Office: 2,457 Days
• Field of Search: 438/287, 438/261, 438/786, 438/787, 438/788, 438/199, 438/775, 438/790, 438/264, 438/279, 438/275, 438/591, 438/592, 438/593, 438/594, 438/411, 438/413, 438/776, 438/777, 438/274, 438/301, 438/785, 438/792, 438/732, 438/197
• US Class Current: 438/287
• CPC Class Codes: H01L 21/02332 into an oxide layer, e.g. changing SiO to SiON
• CPC Class Codes: H01L 21/0234 treatment by exposure to a plasma
• CPC Class Codes: H01L 21/265 producing ion implantation
• CPC Class Codes: H01L 21/28061 the conductor comprising a metal or metal silicide formed by deposition, e.g. sputter deposition, i.e. without a silicidation reaction H01L21/28052 takes precedence
• CPC Class Codes: H01L 21/28167 on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
• CPC Class Codes: H01L 21/28185 with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
• CPC Class Codes: H01L 21/28202 in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
• CPC Class Codes: H01L 21/3144 on silicon
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
• CPC Class Codes: H01L 29/6659 with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
• CPC Class Codes: H01L 29/7833 with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's for thin film transistors H01L29/78618

Abstract

The invention encompasses a method of incorporating nitrogen into a silicon-oxide-containing layer. The silicon-oxide-containing layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer. The nitrogen is subsequently thermally annealed within the layer to bond at least some of the nitrogen to silicon within the layer. The invention also encompasses a method of forming a transistor. A gate oxide layer is formed over a semiconductive substrate. The gate oxide layer comprises silicon dioxide. The gate oxide layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer, and the layer is maintained at less than or equal to 400° C. during the exposing. Subsequently, the nitrogen within the layer is thermally annealed to bond at least a majority of the nitrogen to silicon. At least one conductive layer is formed over the gate oxide layer. Source/drain regions are formed within the semiconductive substrate, and are gatedly connected to one another by the at least one conductive layer. The invention also encompasses transistor structures.

Claims

1. A method of forming a nitrogen-enriched region within a silicon-oxide-containing layer, comprising:

providing the silicon-oxide-containing layer over a substrate;

the silicon-oxide-containing layer having a bare upper surface above the substrate and a lower surface on the substrate;

exposing the silicon-oxide-containing layer to an activated nitrogen species from a nitrogen-containing plasma to introduce nitrogen into the silicon-oxide-containing layer and form a nitrogen-enriched region, the nitrogen-enriched region being only in an upper half of the silicon-oxide-containing layer;

subsequent to the introduction of nitrogen into the silicon-oxide-containing layer, thermally annealing the nitrogen within the nitrogen-enriched region, while the bare upper surface of the silicon-oxide-containing layer remains bare, to bond at least some of the nitrogen to silicon proximate the nitrogen;

the nitrogen-enriched region remaining confined to the upper half of the silicon-oxide-containing layer during the annealing; and

wherein the nitrogen-enriched region is formed only in the upper third of the silicon-oxide-containing layer by the exposing and remains confined to the upper third of the silicon-oxide-containing layer during the annealing.

2. The method of claim 1 wherein the nitrogen-enriched region is formed only in the upper fourth of the silicon-oxide-containing layer by the exposing and remains confined to the upper fourth of the silicon-oxide-containing layer during the annealing.

3. The method of claim 1 wherein the nitrogen-enriched region is formed only in the upper fifth of the silicon-oxide-containing layer by the exposing and remains confined to the upper fifth of the silicon-oxide-containing layer during the annealing.

4. The method of claim 1 wherein the silicon-oxide-containing layer is maintained at a temperature of less than 200°

C. during the exposing.

5. The method of claim 1 wherein the plasma is maintained with a power of from about 500 watts to about 5000 watts during the exposing.

6. The method of claim 1 wherein the exposing occurs within a reactor, and wherein a pressure within the reactor is from about 5 mTorr to about 10 mTorr during the exposing.

7. The method of claim 1 wherein the exposing occurs for a time of less than or equal to about 1 minute.

8. The method of claim 1 wherein the thermal annealing comprises thermal processing at a temperature of about 700°

C. for a time of about 30 seconds.

9. The method of claim 1 wherein the thermal annealing comprises thermal processing at a temperature of about 1050°

C. for a time of about 5 seconds.

10. The method of claim 1 wherein the thermal annealing comprises rapid thermal processing at a ramp rate of at least about 50°

C./sec to a process temperature of less than 1000°

C., with the process temperature being maintained for at least about 30 seconds.