Memory fence with background lock release
First Claim
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1. An apparatus comprising:
- a processor operable to issue a first memory request to access a particular memory location, and, prior to completion of the first memory request, issue a command to release a memory lock on the particular memory location when access to the particular memory location is complete, the processor further operable to, prior to release of the memory lock, issue a second memory request to access a different memory location; and
a memory management unit operable to receive the command to release the memory lock, monitor for when access to the particular memory location is complete, and release the memory lock in response to completion.
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Abstract
In one embodiment, a processor is operable to issue a first memory request to access a particular memory location, and, prior to completion of the first memory request, to issue a command to release a memory lock on the particular memory location when access to the particular memory location is complete. The processor is further operable to, prior to release of the memory lock, issue a second memory request to access a different memory location. Also a memory management unit is operable to receive the command to release the memory lock and to monitor for when access to the particular memory location is complete. The memory management unit releases the memory lock in response to completion.
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Citations
20 Claims
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1. An apparatus comprising:
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a processor operable to issue a first memory request to access a particular memory location, and, prior to completion of the first memory request, issue a command to release a memory lock on the particular memory location when access to the particular memory location is complete, the processor further operable to, prior to release of the memory lock, issue a second memory request to access a different memory location; and a memory management unit operable to receive the command to release the memory lock, monitor for when access to the particular memory location is complete, and release the memory lock in response to completion. - View Dependent Claims (2, 3, 4, 5, 6)
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7. An method comprising:
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issuing a first memory request to access a particular memory location; issuing, prior to completion of the first memory request, a command to release a memory lock on the particular memory location when access to the particular memory location is complete; issuing, prior to release of the memory lock, a second memory request to access a different memory location; monitoring for when access to the particular memory location is complete; and releasing the memory lock in response to completion. - View Dependent Claims (8, 9, 10, 11, 12)
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13. An apparatus comprising:
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means for issuing a first memory request to access a particular memory location; means for issuing, prior to completion of the first memory request, a command to release a memory lock on the particular memory location when access to the particular memory location is complete, means for issuing, prior to release of the memory lock, a second memory request to access a different memory location; means for monitoring for when access to the particular memory location is complete; and means for releasing the memory lock in response to completion. - View Dependent Claims (14)
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15. Software embodied in one or more computer-readable media, comprising:
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a memory request instruction that when executed is operable to request access to a particular memory location, and to cause a memory controller to subsequently return a request identifier (ID) associated with the particular memory location when access to the particular memory location is complete; and a memory fence instruction, the memory fence instruction when executed operable to monitor for return of the request ID associated with the particular memory location and to release a memory lock in response to return of the request ID. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification