Secure verification using a set-top-box chip
First Claim
1. A set-top-box chip in a set-top-box comprising:
- a first linear feedback shift register;
a first circuitry for generating a first hashed data sequence from a verification sequence transmitted by a head-end;
a second circuitry for implementing a hashing function for generating a second hashed data sequence;
a third circuitry for generating an encryption key which is a function of an output generated by said first linear feedback shift register;
a one time programmable memory for storing a key, a word, and an identifier word;
a non-volatile memory for storing said output of said first linear feedback shift register, a timer value, and an enable status indicator;
a fourth circuitry for synchronizing said first linear feedback shift register to a second linear feedback shift register in said head-end; and
a fifth circuitry for comparing said first hashed data sequence with said second hashed data sequence, said fifth circuitry generating a control signal for incrementing the state of said first linear feedback shift register enabling operation of said set-top-box chip if said first hashed data sequence is equal to said second hashed data sequence.
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Accused Products
Abstract
One or more methods and systems of authenticating or verifying a set-top-box chip in a set-top-box are presented. In one embodiment, a set-top-box incorporates a set-top-box chip used to decode or decrypt media content provided by a cable television operator or carrier. The set-top-box chip incorporates a decryption circuitry, a compare circuitry, a hash function circuitry, a key generation circuitry, a back channel return circuitry, a linear feedback shift register, a timer reset circuitry, a modify enable status circuitry, a one time programmable memory, and a non-volatile memory. The cable TV carrier validates a set-top-box chip used in a set-top-box by way of a verification sequence that requires a successful verification by the set-top-box chip.
22 Citations
46 Claims
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1. A set-top-box chip in a set-top-box comprising:
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a first linear feedback shift register; a first circuitry for generating a first hashed data sequence from a verification sequence transmitted by a head-end; a second circuitry for implementing a hashing function for generating a second hashed data sequence; a third circuitry for generating an encryption key which is a function of an output generated by said first linear feedback shift register; a one time programmable memory for storing a key, a word, and an identifier word; a non-volatile memory for storing said output of said first linear feedback shift register, a timer value, and an enable status indicator; a fourth circuitry for synchronizing said first linear feedback shift register to a second linear feedback shift register in said head-end; and a fifth circuitry for comparing said first hashed data sequence with said second hashed data sequence, said fifth circuitry generating a control signal for incrementing the state of said first linear feedback shift register enabling operation of said set-top-box chip if said first hashed data sequence is equal to said second hashed data sequence. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A system for securely verifying the authenticity of a set-top-box comprising:
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a first circuitry in a head-end, said first circuitry comprising; a first linear feedback shift register generating a first output; a second circuit for generating a first encryption key using said first output, a word comprising at least 64 bits, and a one time programmable key; a third circuit for generating a first hashed sequence using a hidden constant value and said first output; and a fourth circuit or software for generating a verification sequence transmitted to a set-top-box, said fourth circuit using said first hashed sequence and said first encryption key; and a second circuitry in a set-top-box chip of said set-top-box, said second circuitry comprising; a second linear feedback shift register generating a second output; a fifth circuit for generating a second encryption key using said second output, said word comprising at least 64 bits, and said one time programmable key; a sixth circuit for decrypting said verification sequence using said second encryption key to generate said first hashed sequence; a seventh circuit for generating a second hashed sequence using said hidden constant value and said second output; and an eighth circuit for comparing said first hashed sequence to said second hashed sequence, said eighth circuit generating a signal used to increment the state of said second linear feedback shift register if said first hashed sequence is equal to said second hashed sequence, said signal used for indicating that said first hashed sequence is equal to said second hashed sequence. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22)
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23. A method comprising:
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receiving a verification sequence from a head-end by a set-top-box; generating an encryption key; decrypting said verification sequence using said encryption key to generate a first hashed data sequence; generating a second hashed data sequence; and determining if said first hashed data sequence is equal to said second hashed data sequence, said method verifying the authenticity of a set-top-box chip in said set-top-box, wherein said encryption key is a function of; a one time programmable key; a word comprising at least 64 bits; and a value output by a linear feedback shift register. - View Dependent Claims (24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46)
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Specification