Semiconductor device with reduced package cross-talk and loss

• US 7,435,625 B2
• Filed: 10/24/2005
• Issued: 10/14/2008
• Est. Priority Date: 10/24/2005
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Condie, Brian W., Mahalingam, Mali, Shah, Mahesh K.
• Primary Examiner(s): Chu, Chris C.
• Application Number:
  US11/257,802
• Publication Number:
  US 20070090542A1
• Time in Patent Office: 1,086 Days
• Field of Search: 257/787, 257/E23.119, 257/E23.126, 257/E23.092, 257/E23.121, 257/789, 257/790, 257/795, 257/796, 257/728, 438/112, 438/124, 438/127, 438/106, 438/118, 438/123, 438/126, 438/FOR.367, 438/FOR.379, 437/207, 437/219, 174/559, 174/52.2, 174/52.4
• US Class Current: 438/124
• CPC Class Codes: H01L 2224/05553 being rectangular
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/85 using a wire connector
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/295 containing a filler H01L23/296 takes precedence
• CPC Class Codes: H01L 23/3135 Double encapsulation or coating and encapsulation
• CPC Class Codes: H01L 23/4334 Auxiliary members in encapsulations H01L23/49568 takes precedence
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01021 Scandium [Sc]
• CPC Class Codes: H01L 2924/01025 Manganese [Mn]
• CPC Class Codes: H01L 2924/09701 Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/10161 with a rectangular active surface
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H01L 2924/181 Encapsulation
• CPC Class Codes: H01L 2924/207 Diameter ranges
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding

Abstract

Structure and method are provided for plastic encapsulated semiconductor devices having reduced package cross-talk and loss. Semiconductor die are first coated with a buffer region having a lower dielectric constant ε and/or lower loss tangent δ than the plastic encapsulation. The encapsulation surrounds the buffer region providing a solid structure. The lower ε buffer region reduces the stray capacitance and therefore the cross-talk between electrodes on or coupled to the die. The lower δ buffer region reduces the parasitic loss in the encapsulation. Low ε and/or δ buffer regions can be achieved using low density organic and/or inorganic materials. Another way is to disperse hollow microspheres or other fillers in the buffer region. An optional sealing layer formed between the buffer region and the encapsulation can mitigate any buffer layer porosity. The buffer region desirably has ε less than about 3.0 and/or δ less than about 0.005.

Claims

1. A method of encapsulating a semiconductor die, comprising:

mounting the die on a lead-frame;

adding particles of a filler to a resin, wherein the particles of the filler have a mix of filler sizes, and the particles of the filler are tightly packed within the resin;

covering a portion of the die with a buffer region of a first dielectric constant and first loss tangent, wherein the buffer region includes the resin and the filler packed within the resin;

placing the lead-frame with the die and buffer region in a mold suitable for plastic encapsulation, wherein the die and buffer region are located in a cavity in the mold; and

placing a plastic encapsulant in the cavity of the mold to substantially fill the cavity of the mold around the lead frame, die and buffer region with a plastic material of a second dielectric constant and a second loss tangent, wherein at least the second dielectric constant is larger than the first dielectric constant or the second loss tangent is larger than the first loss tangent.

2. The method of claim 1, further comprising, after the step of covering the portion of the die, curing the buffer region.

3. The method of claim 1, wherein the step of covering the portion of the die comprises covering the portion of the die with a buffer region material having the filler therein comprising hollow microspheres.

4. The method of claim 3, wherein the step of covering the portion of the die comprises covering the portion of the die with a buffer region material having a first dielectric constant less than about 80% of the second dielectric constant.

5. The method of claim 1, further comprising, between the step of covering the portion of the die and the step of placing the plastic encapsulant in the cavity, covering the buffer region with a sealing layer.

6. The method of claim 1, wherein the step of covering the portion of the die comprises covering the portion of the die with a material that includes an organic material.

7. The method of claim 6, wherein the step of covering the portion of the die comprises covering the portion of the die with a material that includes an inorganic material.

8. The method of claim 1, wherein the step of covering the portion of the die comprises covering the portion of the die with a buffer region material having the filler therein comprising finely divided styrene.

9. The method of claim 1, wherein the step of covering the portion of the die comprises covering the portion of the die with a buffer region material having the filler therein comprising a plastic.

10. The method of claim 1, wherein the step of covering the portion of the die comprises covering the portion of the die with a buffer region material having the filler therein comprising glass fragments.

11. The method of claim 1, wherein the step of covering the portion of the die comprises covering the portion of the die with a buffer region material having the filler therein comprising ceramic fragments.

12. The method of claim 1, wherein the step of covering the portion of the die comprises covering the portion of the die with a buffer region material having the filler therein comprising filler having particles equal to 300 micro-meters or less.