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Fabrication of self-aligned gallium arsenide MOSFETs using damascene gate methods

  • US 7,435,636 B1
  • Filed: 03/29/2007
  • Issued: 10/14/2008
  • Est. Priority Date: 03/29/2007
  • Status: Active Grant
First Claim
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1. A method for fabricating a gallium arsenide MOSFET device, the method comprising:

  • forming a dummy gate over a gallium arsenide substrate;

    implanting source-drain extensions into the substrate adjacent the dummy gate;

    forming dummy oxide spacers along the sidewalls of the dummy gate and over a portion of the source-drain extensions;

    implanting and annealing source-drain regions adjacent the source-drain extensions;

    forming insulating spacers on the sides of the dummy oxide spacers;

    defining the source-drain regions with a photoresist layer;

    forming a conductive layer over the photoresist layer;

    lifting off the photoresist layer and annealing the conductive layer to form contacts to the source-drain regions;

    removing the dummy gate and the dummy oxide spacers to form a gate opening;

    depositing in-situ a passivation layer in the gate opening;

    oxidizing the surface of the passivation layer to create an oxide layer;

    depositing ex-situ a dielectric layer over the oxide layer; and

    depositing a gate metal over the dielectric layer to form a gate stack in the gate opening.

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