Fabrication of self-aligned gallium arsenide MOSFETs using damascene gate methods
First Claim
1. A method for fabricating a gallium arsenide MOSFET device, the method comprising:
- forming a dummy gate over a gallium arsenide substrate;
implanting source-drain extensions into the substrate adjacent the dummy gate;
forming dummy oxide spacers along the sidewalls of the dummy gate and over a portion of the source-drain extensions;
implanting and annealing source-drain regions adjacent the source-drain extensions;
forming insulating spacers on the sides of the dummy oxide spacers;
defining the source-drain regions with a photoresist layer;
forming a conductive layer over the photoresist layer;
lifting off the photoresist layer and annealing the conductive layer to form contacts to the source-drain regions;
removing the dummy gate and the dummy oxide spacers to form a gate opening;
depositing in-situ a passivation layer in the gate opening;
oxidizing the surface of the passivation layer to create an oxide layer;
depositing ex-situ a dielectric layer over the oxide layer; and
depositing a gate metal over the dielectric layer to form a gate stack in the gate opening.
8 Assignments
0 Petitions
Accused Products
Abstract
A method for fabricating a gallium arsenide MOSFET device is presented. A dummy gate is formed over a gallium arsenide substrate. Source-drain extensions are implanted into the substrate adjacent the dummy gate. Dummy spacers are formed along dummy gate sidewalls and over a portion of the source-drain extensions. Source-drain regions are implanted. Insulating spacers are formed on dummy oxide spacer sidewalls. A conductive layer is formed over the source-drain regions. The conductive layer is annealed to form contacts to the source-drain regions. The dummy gate and the dummy oxide spacers are removed to form a gate opening. A passivation layer is in-situ deposited in the gate opening. The surface of the passivation layer is oxidized to create an oxide layer. A dielectric layer is ex-situ deposited over the oxide layer. A gate metal is deposited over the dielectric layer to form a gate stack in the gate opening.
162 Citations
31 Claims
-
1. A method for fabricating a gallium arsenide MOSFET device, the method comprising:
-
forming a dummy gate over a gallium arsenide substrate; implanting source-drain extensions into the substrate adjacent the dummy gate; forming dummy oxide spacers along the sidewalls of the dummy gate and over a portion of the source-drain extensions; implanting and annealing source-drain regions adjacent the source-drain extensions; forming insulating spacers on the sides of the dummy oxide spacers; defining the source-drain regions with a photoresist layer; forming a conductive layer over the photoresist layer; lifting off the photoresist layer and annealing the conductive layer to form contacts to the source-drain regions; removing the dummy gate and the dummy oxide spacers to form a gate opening; depositing in-situ a passivation layer in the gate opening; oxidizing the surface of the passivation layer to create an oxide layer; depositing ex-situ a dielectric layer over the oxide layer; and depositing a gate metal over the dielectric layer to form a gate stack in the gate opening. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22)
-
-
23. A method for fabricating a gallium arsenide MOSFET device, the method comprising:
-
depositing a sacrificial oxide layer on a substrate of gallium arsenide; forming shallow trench isolations regions in the substrate; implanting deep p-wells into the substrate; implanting and annealing shallow n-channels after the deep p-well implants; forming a dummy gate over the shallow n-channel and the sacrificial oxide layer; implanting source-drain extensions adjacent the dummy gate and the shallow trench isolation regions; forming dummy oxide spacers along the sidewalls of the dummy gate and over a portion of the source-drain extensions; implanting and annealing source-drain regions adjacent the source-drain extensions and the shallow trench isolation regions; forming insulating spacers on the sides of the dummy oxide spacers; defining the source-drain regions with a photoresist layer; forming a conductive layer over the photoresist layer; lifting off the photoresist layer and annealing the conductive layer over the source-drain regions to form alloy contacts to the source-drain regions; depositing a layer of nitride; depositing a first layer of oxide over the layer of nitride and planarizing the first oxide layer to the uppermost surface of the layer of nitride, wherein the uppermost surface of the first layer of oxide is co-planar to the uppermost surface of the layer of nitride; etching the first layer of oxide and layer of nitride to the uppermost surface of the dummy gate; removing the dummy gate; removing the dummy oxide spacers and the sacrificial oxide layer; wet cleaning the surface of the substrate; removing surface oxygen using atomic hydrogen; depositing in-situ a passivation layer; oxidizing the surface of the passivation layer to create a second oxide layer; depositing ex-situ a dielectric layer over the second oxide layer; and depositing gate metal over the dielectric layer to form a gate stack. - View Dependent Claims (24, 25, 26, 27, 28, 29, 30, 31)
-
Specification