Low-gain current-mode voltage regulator

• US 7,436,158 B2
• Filed: 07/27/2006
• Issued: 10/14/2008
• Est. Priority Date: 07/27/2006
• Status: Active Grant

• Current Assignee: Infineon Technologies AG, Richtek Technology Corporation (MediaTek, Inc.)
• Original Assignee: Richtek Technology Corporation (MediaTek, Inc.)
• Inventors: Huang, Jian-Rong, Bernacchia, Giuseppe, Tseng, Kuo-Lung, Inversi, Maurizio
• Primary Examiner(s): Riley; Shawn
• Application Number:
  US11/493,550
• Publication Number:
  US 20080024100A1
• Time in Patent Office: 810 Days
• Field of Search: 323/224, 323/283, 323/284, 323/285
• US Class Current: 323/224
• CPC Class Codes: H02M 3/158 including plural semiconductor devices as final control devices for a single load

Abstract

In a low-gain current-mode voltage regulator having a PWM comparator in response to the varying output voltage and inductor current of the voltage regulator to produce a PWM signal to regulate the output voltage, an offset signal is derived from a subtraction between the inputs of the PWM comparator, and the offset signal is injected into the PWM comparator to cancel the output offset of the voltage regulator.

Claims

1. A low-gain current-mode voltage regulator comprising:

a PWM comparator in response to a first input and a second input for producing a PWM signal to regulate an output voltage of said voltage regulator;

a low-gain error amplifier for producing a first signal varying with a difference between said output voltage and a reference voltage to provide for said first input;

a current sense circuit for producing a second signal varying with an inductor current of said voltage regulator to provide for said second input; and

an offset cancellation circuit for producing an offset signal from a subtraction between said first and second inputs to inject into said PWM comparator.

2. The voltage regulator of claim 1, wherein said offset signal is injected into either one of said first and second inputs.

3. The voltage regulator of claim 1, wherein said offset cancellation circuit comprises:

a combiner for producing a third signal from said subtraction; and

a low-pass filter for filtering said third signal to produce said offset signal.

4. The voltage regulator of claim 1, further comprising a slope compensation signal for injecting into said second input.

5. A control method for a low-gain current-mode voltage regulator, comprising the steps of:

producing a PWM signal by a PWM comparator in response to a first input and a second input for regulating an output voltage of said voltage regulator;

producing a first signal varying with a difference between said output voltage and a reference voltage for providing for said first input;

producing a second signal varying with an inductor current of said voltage regulator for providing for said second input;

producing an offset signal from a subtraction between said first and second inputs for injecting into said PWM comparator.

6. The control method of claim 5, wherein said offset signal is injected into either one of said first and second inputs.

7. The control method of claim 5, wherein said step of producing an offset signal comprises the steps of:

producing a third signal from said subtraction; and

filtering said third signal for producing said offset signal.

8. The control method of claim 5, further comprising the step of injecting a slope compensation signal into said second input.