Integrated circuit communication techniques
First Claim
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1. A semiconductor device comprising:
- a first logic block and a second logic block, and a high speed connection for transferring logic information from said first logic block to said second logic block, wherein said second logic block comprises a register to capture said information; and
a clock distribution system for distributing a clock signal, wherein said clock signal is used to synchronize the powering of said receiver and the timing of said capturing;
wherein said logic information is represented by a direction of current flow in said high speed connection, wherein said second logic block comprises a receiver to convert said direction of current flow to a voltage level logic representation, and wherein said receiver is powered for small periods of time to save circuit power.
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Abstract
An semiconductor device, containing logic blocks and high speed connections between the blocks, where the connections utilize current direction for logic representation rather than voltage level. Such high speed connections comprise differential transmitters which drive a pair of adjacent wires with differential current pulses that are received by a differential receiver which may be put in a low power state between transmissions.
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Citations
21 Claims
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1. A semiconductor device comprising:
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a first logic block and a second logic block, and a high speed connection for transferring logic information from said first logic block to said second logic block, wherein said second logic block comprises a register to capture said information; and a clock distribution system for distributing a clock signal, wherein said clock signal is used to synchronize the powering of said receiver and the timing of said capturing; wherein said logic information is represented by a direction of current flow in said high speed connection, wherein said second logic block comprises a receiver to convert said direction of current flow to a voltage level logic representation, and wherein said receiver is powered for small periods of time to save circuit power. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A semiconductor device comprising:
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a first logic block and a second logic block, and a high speed connection for transferring logic information from said first logic block to said second logic block, wherein said first logic block comprises a transceiver to convert a voltage level logic representation to said direction of current flow; and a clock distribution system, wherein said clock is used to synchronize said transceiver and the powering of said receiver; wherein said logic information is represented by a direction of current flow in said high speed connection, wherein said second logic block comprises a receiver to convert said direction of current flow to a voltage level logic representation, and wherein said receiver is powered for small periods of time to save circuit power; and wherein said clock distribution system distributes the clock using pulses of light.
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14. A semiconductor device comprising:
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a first logic block and a second logic block, and a high speed connection for transferring logic information from said first logic block to said second logic block, said high speed connection comprising two wires; and a clock distribution system for distributing a clock signal, wherein said clock signal is used to synchronize the powering of said transmitter; wherein said logic information is represented by a direction of current flow in said high speed connection, wherein said first logic block comprises a transmitter to convert voltage level logic representations to directions of current flow, and wherein said transmitter is powered for small periods of time to save circuit power; and wherein said clock distribution system distributes the clock using pulses of light.
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15. A semiconductor device comprising:
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a first logic block and a second logic block, and a high speed connection for transferring logic information from said first logic block to said second logic block, said high speed connection comprising two wires; wherein said logic information is represented by a direction of current flow in said high speed connection, wherein said first logic block comprises a transmitter to convert voltage level logic representations to directions of current flow, and wherein said transmitter is powered for small periods of time to save circuit power; and wherein said transmitter shunts said two wires together when said transmitter is not in a powered state. - View Dependent Claims (16, 17, 18, 19, 20, 21)
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Specification