Programming non-volatile memory with improved boosting

• US 7,440,326 B2
• Filed: 09/06/2006
• Issued: 10/21/2008
• Est. Priority Date: 09/06/2006
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: SanDisk Corporation (Western Digital Corporation)
• Inventors: Ito, Fumitoshi
• Primary Examiner(s): Hoang; Huan
• Application Number:
  US11/516,976
• Publication Number:
  US 20080055995A1
• Time in Patent Office: 776 Days
• Field of Search: 365/185.18, 365/185.02, 365/185.17
• US Class Current: 365/185.18
• CPC Class Codes: G11C 16/0483 comprising cells having several storage transistors connected in series
• CPC Class Codes: G11C 16/12 Programming voltage switching circuits

Abstract

Non-volatile storage elements are programmed in a manner that reduces program disturb, particularly at the edges storage elements strings, by using modified pass voltages. In particular, during the programming of a selected storage element, an isolation voltage is applied to a storage element proximate to the selected storage element thereby electrically dividing the channel associated with the storage elements into two isolated areas. Additional isolated areas are formed remotely from the selected storage element by applying the isolation voltage to other remote storage elements. The isolated channel regions associated with the storage elements are then boosted with different pass voltages in order to alleviate the effects of program disturb. Thus, a standard pass voltage is applied to storage elements immediately adjacent to the selected storage element, and a lower pass voltage is applied to storage elements remote from the selected storage element. In one preferred embodiment, a higher pass voltage is applied to storage elements immediately adjacent the selected storage element on the side having previously programmed storage elements. These techniques reduce the leakage of charge from adjacent boosted channel regions caused by gate induced drain leakage at the source select line and the drain select line, as well as from isolation word lines, thereby reducing program disturb effects.

Claims

1. A method for programming a set of non-volatile storage elements, comprising:

isolating at least three channel regions associated with the non-volatile storage elements, wherein a first channel region and a second channel region are proximate to a selected storage element, and a third channel region is remote from the selected storage element;

boosting a potential of each channel region, wherein the potential of the third channel region is boosted with a lower boosting voltage than the potentials of the first and second channel regions.

2. The method of claim 1, wherein the potentials of the first and second channel regions are boosted with a first boosting voltage and the potential of the third channel region is boosted with a second boosting voltage.

3. The method of claim 1, wherein the first and second channel regions are located on opposing sides of the selected storage element.

4. The method of claim 3, further comprising

boosting a potential of the first channel region using a third boosting voltage,

boosting a potential of the second channel region using a first boosting voltage, and

boosting a potential of the third channel region using a second boosting voltage,

wherein the third boosting voltage is greater than the first boosting voltage, and the first boosting voltage is greater than the second boosting voltage.

5. The method of claim 1, wherein the isolating step includes:

applying an isolation voltage to a first storage element located proximate to the selected storage element and to a second storage element located remote from the selected storage element.

6. The method of claim 5, wherein the isolating step further includes:

applying a gate protect voltage to a third storage element located immediately adjacent to the first storage element and to a fourth storage element located immediately adjacent to the second storage element.

7. The method of claim 5, wherein the isolating step further includes:

applying a gate protect voltage to third and fourth storage elements located immediately adjacent on opposite sides of the first storage element and to fifth and sixth storage elements located immediately adjacent on opposite sides of the second storage element.

8. A method for programming a set of non-volatile storage elements, comprising:

selecting a storage element for programming;

applying an isolation voltage to at least two storage elements located apart from each other thereby electrically dividing the set of storage elements into at least a first, a second, and a third subset of storage elements, wherein the first and second subsets are located proximate to the selected storage element and the third subset is located remote from the selected storage element; and

applying a distinct boosting voltage to each subset of the storage elements;

wherein the boosting voltage applied to the third subset of storage elements is lower than the boosting voltages applied to the first and second subsets of storage elements.

9. The method of claim 8, further comprising:

applying the isolation voltage to a third storage element located remote from the selected storage element thereby further electrically dividing the set of storage elements into a fourth subset of storage elements, wherein the first and second subsets are proximate to the selected storage element and the third and fourth subsets are remote from the selected storage element; and

applying a distinct boosting voltage to the fourth subset of the storage elements, wherein the boosting voltages applied to the third and fourth subsets of storage elements are lower than the boosting voltages applied to the first and second subsets of storage elements.

10. The method of claim 8, further comprising:

applying a boosting voltage to storage elements located in the first subset of storage elements that is higher than the boosting voltage applied to storage elements located in the second subset of storage elements.

11. The method of claim 8, wherein a gate protect voltage is applied to at least two storage elements each located immediately adjacent to respective ones of the at least two storage elements to which the isolation voltage is applied.

12. The method of claim 8, wherein a gate protect voltage is applied to at least four more storage elements, which are paired immediately adjacent and on opposite sides of respective ones of the at least two storage elements to which the isolation voltage is applied.

13. The method of claim 8, wherein a gate protect voltage is applied to a first storage element located immediately adjacent to the selected storage element, and the isolation voltage is applied to a second storage clement located immediately adjacent to the first storage element.

14. The method of claim 8, wherein a pass voltage is applied to a first storage element located immediately adjacent to the selected storage element, a gate protect voltage is applied to a second storage element located immediately adjacent to the first storage element, and the isolation voltage is applied to a third storage element located immediately adjacent to the second storage element.

15. A method for programming a set of non-volatile storage elements, comprising:

applying a programming voltage to a selected storage element;

electrically dividing a channel associated with the set of storage elements into at least three channel regions, wherein a first and second of the channel regions are proximate to the selected storage element and a third channel region is remote from the selected storage element; and

boosting a potential of each channel region, wherein the potential of the third channel region is boosted with a lower boosting voltage than the potentials of the first and second channel regions.

16. The method of claim 15, further comprising:

electrically dividing the channel into a fourth channel region, said fourth channel region being remote from the selected storage element; and

boosting a potential of the fourth channel region using a lower boosting voltage than is applied to boost the potentials of the first and second channel regions.

17. A method for programming a set of non-volatile storage elements arranged between a first select gate and a second select gate, comprising:

applying a programming voltage to a selected storage element;

applying an isolation voltage to at least two storage elements, a first of the storage elements located proximate to the selected storage element and a second of the storage elements located remote from the selected storage element, thereby electrically dividing a channel associated with the storage elements into at least three channel regions, wherein a first and second channel region are proximate to the selected storage element and a third channel region is remote from the selected storage element; and

applying a distinct boosting voltage to each of the storage elements, wherein a lower boosting voltage is applied to storage elements located in correspondence with the third channel region than is applied to storage elements located in correspondence with the first and second channel regions.

18. The method of claim 17, further comprising:

applying a gate protect voltage to a third storage element located adjacent to the first storage element and to a fourth storage element located adjacent to the second storage element.

19. The method of claim 18, wherein the isolation voltage is a low voltage and the gate protect voltage is an intermediate voltage.

20. The method of claim 19, wherein the isolation voltage is approximately zero volts and the gate protect voltage is approximately three volts.

21. The method of claim 17, further comprising:

applying an isolation voltage to a third storage element located remote from the selected storage element thereby electrically dividing the channel associated with the storage elements into at least four channel regions; and

applying a distinct boosting voltage to each of the storage elements, wherein a lower boosting voltage is applied to storage elements located in correspondence with the third and fourth channel regions than is applied to storage elements located in correspondence with the first and second channel regions.

22. A method for programming a set of non-volatile storage elements that are arranged between a first select gate and a second select gate, comprising:

selecting a storage element for programming;

electrically dividing a channel associated with the set of storage elements into at least thee channel regions, a first channel region being located proximate to the selected storage element on a side nearer the first select gate, a second channel region being located proximate to the selected storage element on a side nearer the second select gate, and a third channel region being located remote from the selected storage element;

boosting a channel voltage of the first and second channel regions with a first boost voltage; and

boosting a channel voltage of the third channel region with a second boost voltage;

wherein the first boosting voltage is greater than the second boosting voltage.

23. The method of claim 22, further comprising:

electrically dividing the channel into at least four channel regions, a fourth channel region being located remote from the selected storage element on a side nearer the second select gate, the third channel region being located on a side nearer the first select gate; and

boosting a channel voltage of the fourth channel regions with a third boost voltage,

wherein the third boosting voltage is greater than the first boosting voltage.

24. A system for programming a set of non-volatile storage elements, comprising:

a plurality of non-volatile storage elements;

a managing circuit in communication with the storage elements, wherein the managing circuit isolates at least thee channel regions associated with the non-volatile storage elements, wherein a first channel region and a second channel region are proximate to a selected storage element, and a third channel region is remote from the selected storage element, and boosts a potential of each channel region, wherein the potential of the third channel region is boosted with a lower boosting voltage than the potentials of the first and second channel regions.

25. The system of claim 24, wherein the potentials of the first and second channel regions are boosted by the managing circuit with a first boosting voltage and the potential of the third channel region is boosted with a second boosting voltage.

26. The system of claim 24, wherein the first and second channel regions are located on opposing sides of the selected storage element.

27. The system of claim 26, wherein the managing circuit boosts a potential of the first channel region using a third boosting voltage, boosts a potential of the second channel region using a first boosting voltage, and boosts a potential of the third channel region using a second boosting voltage, wherein the third boosting voltage is greater than the first boosting voltage, and the first boosting voltage is greater than the second boosting voltage.

28. The system of claim 26, wherein the managing circuit further isolates a fourth channel region, and boosts a potential of the fourth channel region using the second boosting voltage;

wherein the fourth channel region is remote from the selected storage element and located adjacent to the third channel region, and wherein the third channel region is located adjacent to the first channel region.

29. The system of claim 24, wherein the managing circuit applies an isolation voltage to a first storage element located proximate to the selected storage clement and to a second storage element located remote from the selected storage element.

30. The system of claim 29, wherein the managing circuit applies a gate protect voltage to a third storage element located immediately adjacent to the first storage element and to a fourth storage element located immediately adjacent to the second storage element.

31. The system of claim 29, wherein the managing circuit applies a gate protect voltage to third and fourth storage elements located immediately adjacent on opposite sides of the first storage element and to fifth and sixth storage elements located immediately adjacent on opposite sides of the second storage element.

32. A system for programming a set of non-volatile storage elements, comprising:

a plurality of non-volatile storage elements;

a managing circuit in communication with the storage elements, wherein the managing circuit selects a storage element for programming, applies an isolation voltage to at least two storage elements located apart from each other thereby electrically dividing the set of storage elements into at least a first, a second, and a third subset of storage elements, wherein the first and second subsets are located proximate to the selected storage element and the third subset is located remote from the selected storage element, and applies a distinct boosting voltage to each subset of the storage elements, wherein the boosting voltage applied to the third subset of storage elements is lower that the boosting voltages applied to the first and second subsets of storage elements.

33. The system of claim 32, wherein the managing circuit applies the isolation voltage to a third storage element located remote from the selected storage element thereby further electrically dividing the set of storage elements into a fourth subset of storage elements, wherein the first and second subsets are proximate to the selected storage element and the third and fourth subsets are remote from the selected storage element, and applies applies a distinct boosting voltage to the fourth subset of the storage elements, wherein the boosting voltages applied to the third and fourth subsets of storage elements is lower that the boosting voltages applied to the first and second subsets of storage elements.

34. The system of claim 32, wherein the managing circuit applies a boosting voltage to storage elements located in the first subset of storage elements that is higher than the boosting voltage applied to storage elements located in the second subset of storage elements.

35. The system of claim 32, wherein the managing circuit applies a gate protect voltage to at least two storage elements each located immediately adjacent to respective ones of the at least two storage elements to which the isolation voltage is applied.

36. The system of claim 32, wherein the managing circuit applies a gate protect voltage to at least four more storage elements, which are paired immediately adjacent and on opposite sides of respective ones of the at least two storage elements to which the isolation voltage is applied.

37. The system of claim 32, wherein the managing circuit applies a gate protect voltage to a first storage element located immediately adjacent to the selected storage element, and the isolation voltage is applied to a second storage element located immediately adjacent to the first storage element.

38. The system of claim 32, wherein the managing circuit applies a pass voltage to a first storage element located immediately adjacent to the selected storage element, a gate protect voltage is applied to a second storage element located immediately adjacent to the first storage element, and the isolation voltage is applied to a third storage element located immediately adjacent to the second storage element.

39. A system for programming a set of non-volatile storage elements, comprising:

a plurality of non-volatile storage elements;

a managing circuit in communication with the storage elements, wherein the managing circuit applies a programming voltage to a selected storage element, electrically divides a channel associated with the set of storage elements into at least three channel regions, wherein a first and second of the channel regions are proximate to the selected storage element and a third channel region is remote from the selected storage element, boosts a potential of the first and second channel regions using a first boosting voltage, boosts a potential of each channel region, wherein the potential of the third channel regions is boosted with a lower boosting voltage than the potentials of the first and second channel regions.

40. The system of claim 39, wherein the managing circuit electrically divides the channel into a fourth channel region, said fourth channel region being remote from the selected storage element, and boosts a potential of the fourth channel region using a lower boosting voltage than is applied to boost the potentials of the first and second channel regions.

41. A system for programming a set of non-volatile storage elements arranged between a first select gate and a second select gate, comprising:

a plurality of non-volatile storage elements;

a managing circuit in communication with the storage elements, wherein the managing circuit applies a programming voltage to a selected storage element, applies an isolation voltage to at least two storage elements, a first of the storage elements located proximate to the selected storage element and a second of the storage elements located remote from the selected storage element, thereby electrically dividing a channel associated with the storage elements into at least three channel regions, wherein a first and second channel region are proximate to the selected storage element and a third channel region is remote from the selected storage element, applies a distinct boosting voltage to each of the storage elements, wherein a lower boosting boltage is applied to storage elements located in correspondence with the third channel region than is applied to storage elements located in correspondence with the first and second channel regions.

42. The system of claim 41, wherein the managing circuit applies a gate protect voltage to a third storage element located adjacent to the first storage element and to a fourth storage element located adjacent to the second storage element.

43. The system of claim 42, wherein the isolation voltage is a very low voltage and the gate protect voltage is an intermediate voltage.

44. The system of claim 43, wherein the isolation voltage is approximately zero volts and the gate protect voltage is approximately three volts.

45. The system of claim 41, wherein the managing circuit applies an isolation voltage to a third storage element located remote from the selected storage element thereby electrically dividing the channel associated with the storage elements into at least four channel regions;

and applies a distinct boosting voltage to each of the storage elements, wherein a lower boosting voltage is applied to storage elements located in correspondence with the third channel region than is applied to storage elements located in correspondence with the first and second channel regions.

46. A system for programming a set of non-volatile storage elements that are arranged between a first select gate and a second select gate, comprising:

a plurality of non-volatile storage elements;

a managing circuit in communication with the storage elements, wherein the managing circuit selects a storage element for programming, electrically divides a channel associated with the set of storage elements into at least three channel regions, a first channel region being located proximate to the selected storage element on a side nearer the first select gate, a second channel region being located proximate to the selected storage element on a side nearer the second select gate, and a third channel region being located remote from the selected storage element, boosts a channel voltage of the first and second channel regions with a first boost voltage, boosts a channel voltage of the third channel region with a second boost voltage, wherein the first boosting voltage is greater than the second boosting voltage.

47. The system of claim 46, wherein the managing circuit further electrically divides the channel into at least four channel regions, a fourth channel region being located remote from the selected storage element on a side nearer the second select gate, the third channel region being located on a side nearer the first select gate, boosts a channel voltage of the fourth channel regions with a third boost voltage, wherein the third boosting voltage is greater than the first boosting voltage.