Semiconductor device for use as multimedia memory card, has encapsulant with chamfer such that portion of substrate and chamfer are exposed from encapsulant and remaining portion of surface of substrate is covered by encapsulant

• US 7,443,016 B2
• Filed: 10/13/2005
• Issued: 10/28/2008
• Est. Priority Date: 06/07/2005
• Status: Expired due to Fees

• Current Assignee: Siliconware Precision Industries Co., Ltd.
• Original Assignee: Silicon Precision Industries Company Limited
• Inventors: Huang, Chien-Ping, Tsai, Yu-Chieh, Tsai, Yun-Lung, Chen, Chien-Chih
• Primary Examiner(s): Mai; Anh D.
• Assistant Examiner(s): VIEIRA, DIANA C
• Application Number:
  US11/163,309
• Publication Number:
  US 20060273442A1
• Time in Patent Office: 1,111 Days
• Field of Search: 257678-733, 257787-796, 174520-521
• US Class Current: 257/678
• CPC Class Codes: H01L 21/565 Moulds
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/49171 Fan-out arrangements
• CPC Class Codes: H01L 2224/49175 Parallel arrangements
• CPC Class Codes: H01L 2224/85 using a wire connector
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/04 characterised by the shape of the container or parts, e.g. caps, walls
• CPC Class Codes: H01L 23/3121 a substrate forming part of the encapsulation
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/16 the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
• CPC Class Codes: H01L 25/18 the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
• CPC Class Codes: H01L 25/50 Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01027 : Cobalt [Co]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/15162 : Top view
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19105 : in a side-by-side arrangement on a common die mounting substrate
• CPC Class Codes: H05K 2201/09127 : PCB or component having an integral separable or breakable part
• CPC Class Codes: H05K 3/284 : for encapsulating mounted components H05K1/185 takes precedence

Abstract

A semiconductor device and a fabrication method thereof are provided. An opening having at least one slanted side is formed on a substrate. At least one chip and at least one passive component are mounted on the substrate. An encapsulant having a cutaway corner is formed on the substrate to encapsulate the chip and the passive component, wherein the cutaway corner of the encapsulant is spaced apart from the slanted side of the opening by a predetermined distance. A singulation process is performed to cut the encapsulant to form a package with a chamfer. The package is embedded in a lid to form the semiconductor device, wherein a portion of the substrate located between the slanted side of the opening and the cutaway corner of the encapsulant is exposed from the encapsulant to form an exposed portion. The present invention also provides a carrier for the semiconductor device.

Claims

1. A semiconductor device, comprising:

a lid having a chamfer; and

a package covered by the lid, the package comprising;

a substrate having a slanted side;

at least one chip and at least one passive component, which are mounted on a surface of the substrate, wherein the chip is electrically connected to the substrate via a plurality of conductive elements; and

an encapsulant formed on the surface of the substrate for encapsulating the at least one chip, the at least one passive component and the conductive elements, the encapsulant being formed with a cutaway corner corresponding to the slanted side of the substrate, such that a portion on the surface of the substrate located between the slanted side thereof and the cutaway corner of the encapsulant is exposed from the encapsulant and the remaining portion of the surface of the substrate is covered by the encapsulant.

2. The semiconductor device of claim 1, wherein with the lid being mounted to the package, the slanted side of the substrate is coupled to the chamfer of the lid.

3. The semiconductor device of claim 1, wherein a side of the encapsulant is coplanar with a side of the substrate.

4. The semiconductor device of claim 1, wherein a side of the encapsulant is slanted inwardly from a side of the substrate to make cross-section of the encapsulant have a wedge shape.

5. The semiconductor device of claim 1, wherein the slanted side of the substrate has a linear shape.

6. The semiconductor device of claim 1, wherein the slanted side of the substrate has a linear shape with at least one turning point.

7. The semiconductor device of claim 1, wherein the slanted side of the substrate has an arc shape.

8. The semiconductor device of claim 1, wherein the slanted side of the substrate has an arc shape with at least one turning point.

9. The semiconductor device of claim 1, wherein the slanted side of the substrate conforms in shape to the chamfer of the lid.

10. The semiconductor device of claim 1, wherein the conductive elements are bonding wires.