Differential amplifier, digital-to-analog converter and display device
First Claim
1. A differential amplifier comprising:
- first to mth (where m is an integer equal to or greater than
2) input terminals;
an output terminal;
first to mth differential pairs;
a current source circuit that supplies currents to respective ones of said first to mth differential pairs;
a first node connected in common with first outputs of each of output pairs of said first to mth differential pairs;
a second node connected in common with second outputs of each of output pairs of said first to mth differential pairs;
a load circuit connected to said first and second nodes;
an amplifier stage that receives a signal from at least one node of said first and second nodes as an input and has an output end connected to said output terminal;
a capacitance element; and
a changeover circuit that controls changeover between a first connection state and a second connection state, responsive to a control signal supplied thereto;
whereinin said first connection state,a first input of each input pair of said first to mth differential pairs is made a non-inverting input and a second input of each input pair of said first to mth differential pairs is made an inverting input,the first inputs of the input pairs of said first to mth differential pairs are connected to respective ones of said first to mth input terminals, andthe second inputs of the input pairs of said first to mth differential pairs are connected in common with one end of said capacitance element and in common with said output terminal; and
in said second connection state,the first input of each input pair of said first to mth differential pairs is made an inverting input and a second input of each input pair of said first to mth differential pairs is made a non-inverting input,the first inputs of the input pairs of said first to mth differential pairs are connected in common with said output terminal, andthe second inputs of the input pairs of said first to mth differential pairs are connected to the one end of said capacitance element;
a first period in which the first connection state is selected and a second period which follows the first period and in which the second connection state is selected forming a data output period.
1 Assignment
0 Petitions
Accused Products
Abstract
Disclosed are a multi-level differential amplifier that includes first to third input terminals; an output terminal; first to third differential pairs; a current source circuit for supplying currents to the respective first to mth differential pairs; a load circuit connected to first and second nodes to which first and second outputs of each of output pairs of the first to third differential pairs are connected in common; an amplifier stage receiving a signal from at least one node of the first and second nodes as an input and having its output connected to the output terminal; and a capacitance element. A data output period includes first and second periods. In the first period, responsive to a control signal, a first input of each input pair of the first to third differential pairs is made a non-inverting input, the second input is made an inverting input, the first inputs are connected to the respective first to third input terminals, and the second inputs of the first to third differential pairs are connected in common with one end of the capacitance element and with the output terminal. In the second period, responsive to a control signal, the first input of each input pair of the first to third differential pairs is made an inverting input and the second input is made a non-inverting input, the first inputs of each of the input pairs are connected in common with the output terminal, and the second inputs are connected in common with the one end of the capacitance element.
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Citations
29 Claims
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1. A differential amplifier comprising:
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first to mth (where m is an integer equal to or greater than
2) input terminals;an output terminal; first to mth differential pairs; a current source circuit that supplies currents to respective ones of said first to mth differential pairs; a first node connected in common with first outputs of each of output pairs of said first to mth differential pairs; a second node connected in common with second outputs of each of output pairs of said first to mth differential pairs; a load circuit connected to said first and second nodes; an amplifier stage that receives a signal from at least one node of said first and second nodes as an input and has an output end connected to said output terminal; a capacitance element; and a changeover circuit that controls changeover between a first connection state and a second connection state, responsive to a control signal supplied thereto;
whereinin said first connection state, a first input of each input pair of said first to mth differential pairs is made a non-inverting input and a second input of each input pair of said first to mth differential pairs is made an inverting input, the first inputs of the input pairs of said first to mth differential pairs are connected to respective ones of said first to mth input terminals, and the second inputs of the input pairs of said first to mth differential pairs are connected in common with one end of said capacitance element and in common with said output terminal; and in said second connection state, the first input of each input pair of said first to mth differential pairs is made an inverting input and a second input of each input pair of said first to mth differential pairs is made a non-inverting input, the first inputs of the input pairs of said first to mth differential pairs are connected in common with said output terminal, and the second inputs of the input pairs of said first to mth differential pairs are connected to the one end of said capacitance element; a first period in which the first connection state is selected and a second period which follows the first period and in which the second connection state is selected forming a data output period. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A differential amplifier comprising:
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first and second input terminals; an output terminal; first and second differential pairs; a current source circuit that supplies currents to respective ones of said first and second differential pairs; a first node connected in common with first outputs of each of output pairs of said first and second differential pairs; a second node connected in common with second outputs of each of output pairs of said first and second differential pairs; a load circuit connected to said first and second nodes; an amplifier stage that receives a signal from at least one node of said first and second nodes as an input and has an output end connected to said output terminal; a capacitance element; and a changeover circuit that controls changeover between a first connection state and a second connection state, responsive to a control signal input thereto, wherein in said first connection state, a first input of each input pair of said first and second differential pairs is made a non-inverting input and a second input of each input pair of said first and second differential pairs is made an inverting input, the first input of the input pair of said first differential pair is connected to said first input terminal, the first input of the input pair of said second differential pair is connected to said second input terminal, and the second inputs of the input pairs of said first and second differential pairs are connected in common with one end of said capacitance element and in common with said output terminal; and in said second connection state, the first input of each input pair of said first and second differential pairs is made an inverting input and a second input of each input pair of said first and second differential pairs is made a non-inverting input, the first inputs of the input pairs of said first and second differential pairs are connected in common with said output terminal, and the second inputs of the input pairs of said first and second differential pairs are connected to the one end of said capacitance element; a first period in which the first connection state is selected and a second period which follows the first period and in which the second connection state is selected forming a data output period. - View Dependent Claims (22, 23, 24, 25, 26, 27, 28)
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29. A differential amplifier comprising:
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first and second input terminals; an output terminal; first to third differential pairs; first to third current source circuits that supply currents individually to respective ones of said first to third differential pairs; a first node forming a common connection node of first outputs of each of output pairs of said first to third differential pairs; a second node forming a common connection node of second outputs of each of output pairs of said first and second differential pairs; a load circuit connected to said first and second nodes; an amplifier stage that receives a signal from at least one node of said first and second nodes as an input and has an output end connected to said output terminal; a single capacitance element; and a changeover circuit that controls changeover between a first connection state and a second connection state, responsive to a control signal supplied thereto;
whereinfirst and second input voltages of mutually different voltage values are applied to said first and second input terminals, respectively; element sizes of said first to third differential pairs are all made identical; current quantities of said first to third current sources are all made identical; and first inputs of input pairs of said first and second differential pairs are connected together and second inputs of input pairs of said first and second differential pairs are connected together; and
whereinin said first connection state, a first input of each input pair of said first to third differential pairs is made a non-inverting input and a second input of each input pair of said first to third differential pairs is made an inverting input, the first input voltage is applied to the first inputs of said first and second differential pairs, the second input voltage is applied to the first input of said first third differential pair, and the second inputs of the input pairs of said first to third differential pairs are connected in common with one end of said capacitance element and in common with said output terminal; and in the second connection state, a first input of each input pair of said first to third differential pairs is made an inverting input and a second input of each input pair of said first to third differential pairs is made a non-inverting input, the first inputs of the input pairs of said first to third differential pairs are connected in common with said output terminal, the second inputs of the input pairs of said first to third differential pairs are connected in common with one end of said capacitance element, and a voltage obtained by internally dividing the first and second input voltages at 1;
2 is amplified and output;a first period in which the first connection state is selected and a second period which follows the first period and in which the second connection state is selected forming a data output period.
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Specification