Wide dynamic range linear-and-log active pixel

• US 7,443,427 B2
• Filed: 08/23/2002
• Issued: 10/28/2008
• Est. Priority Date: 08/23/2002
• Status: Expired due to Term

• Current Assignee: Aptina Imaging Corporation (ON Semiconductor Corporation)
• Original Assignee: Micron Technology, Inc.
• Inventors: Takayanagi, Isao
• Primary Examiner(s): Villecco; John M.
• Assistant Examiner(s): Pasiewicz; Daniel M
• Application Number:
  US10/226,127
• Publication Number:
  US 20040036785A1
• Time in Patent Office: 2,258 Days
• Field of Search: 348/223.1, 348/294, 348/300, 348/301, 348/302, 348/308, 348/655, 257/291, 257/292
• US Class Current: 348/223.1
• CPC Class Codes: H04N 25/573 the logarithmic type
• CPC Class Codes: H04N 25/59 by controlling the amount of charge storable in the pixel, e.g. modification of the charge conversion ratio of the floating node capacitance
• CPC Class Codes: H04N 3/155 Control of the image-sensor operation, e.g. image processing within the image-sensor

Abstract

A pixel circuit having an improved dynamic range is disclosed. When incoming light detected by the photodiode is strong, the accumulated (integrated) charge on a signal capacitor becomes large. To compensate, the excess signal component becomes compressed and the pixel circuit begins operating in logarithmic rather than linear mode. In this way, the circuit can achieve a higher dynamic range more closely resembling the image sensing properties of the human eye.

Claims

1. A method of operating a pixel circuit, comprising:

collecting photogenerated charge at an integration node in response to a pixel signal during a charge integration period;

operating a first transistors, in a shut-off mode, during said integration period when the amount of said collected charge is below a threshold value to cause charge to be linearly collected at said node;

operating said first transistor, in a sub-threshold mode, during said integration period when said collected charge is above said threshold to cause charge to be logarithmically collected at said integration node;

prior to a reset operation, injecting charge into a pixel capacitor coupled to said integration node;

during the time said first transistor is operating in the sub-threshold mode, draining excess charge from said integration node through the first transistor;

separating said collected charge into color and brightness components;

processing said color component;

recombining said brightness and color components;

dividing said logarithmic charge-accumulation phase into first and second logarithmic phases corresponding to lower and higher saturation levels respectively; and

for said second logarithmic phase, eliminating a color signal from an output of said pixel during the processing of said color component.

3. The method of claims 1 or 2, wherein said step of injecting charge comprises, prior to a reset operation, applying a low signal to one of a source and drain terminal of said first transistor and a terminal of a pixel capacitor thereby injecting charge into the pixel capacitor and pinning said pixel capacitor at a low level of a reset line.

4. The method of claim 3, further comprising the acts of:

subsequent to said step of applying a low signal, applying a high signal to said one of the source and drain terminal of said first transistor while maintaining said low signal on said terminal of said pixel capacitor, and subsequent to said step of applying a high signal to the source/drain terminal of said first transistor, applying a high signal to said terminal of said capacitor.

2. A method of operating a pixel circuit, comprising:

collecting photogenerated charge at an integration node in response to a pixel signal during a charge integration period;

operating a first transistors, in a shut-off mode, during said integration period when the amount of said collected charge is below a threshold value to cause charge to be linearly collected at said node;

operating said first transistor, in a sub-threshold mode, during said integration period when said collected charge is above said threshold to cause charge to be logarithmically collected at said integration node;

prior to a reset operation, injecting charge into a pixel capacitor coupled to said integration node;

during the time said first transistor is operating in the sub-threshold mode, draining excess charge from said integration node through the first transistor;

separating said collected charge into color and brightness components;

processing said color component;

recombining said brightness and color components;

dividing said logarithmic charge-accumulation phase into first and second logarithmic phases corresponding to lower and higher saturation levels respectively; and

for said second logarithmic phase, setting a color signal from an output of said pixel to a predetermined minimum value during the processing of said color component.

5. A method of operating a pixel circuit comprising:

collecting photogenerated charge at an integration node in response to a pixel signal during a charge integration period;

operating a first transistors, in a sub-threshold mode, during said integration period when said collected charge is above a threshold voltage of said first transistor to cause charge to be logarithmically collected at said integration node;

dividing said logarithmic charge-collection phase into first and second logarithmic phases corresponding to lower and higher saturation levels respectively; and

processing a signal representing said charge collected during said second logarithmic phase by setting a color signal to a predetermined minimum value.

6. The method of claim 5, wherein the act of processing comprises setting said color signal value to zero.