Circuit for preventing malfunction of arc fault detection device

• US 7,443,644 B2
• Filed: 02/09/2006
• Issued: 10/28/2008
• Est. Priority Date: 02/09/2006
• Status: Expired due to Fees

• Current Assignee: Sam Kyoung Sung
• Original Assignee: Sam Kyoung Sung
• Inventors: Sung, Sam Kyoung
• Primary Examiner(s): Sherry; Michael J
• Assistant Examiner(s): BAUER, SCOTT ALLEN
• Application Number:
  US11/352,112
• Publication Number:
  US 20070183103A1
• Time in Patent Office: 992 Days
• Field of Search: 361/42
• US Class Current: 361/42
• CPC Class Codes: H02H 1/0015 Using arc detectors
• CPC Class Codes: H02H 1/04 Arrangements for preventing response to transient abnormal conditions, e.g. to lightning or to short duration over voltage or oscillations; Damping the influence of dc component by short circuits in ac networks

Abstract

Disclosed herein is a circuit for preventing a malfunction of an arc fault detection device for determining whether an arc fault occurs through a low-current route or a high-current route, classified according to the magnitude of load current, using a source voltage applied to a conductor, which sets an operational prohibition range so as to prevent the malfunction of determining a pseudo-arc signal attributable to various combinations of loads to be an actual arc signal and interrupting a circuit, thus being capable of more precisely controlling the detection of the arc signal.

Claims

1. A circuit for preventing a malfunction of an arc fault detection device, the arc fault detection device having a voltage detection unit for detecting variation in voltage over time for a power source, first and second arc detection units for detecting whether an arc fault occurs through a low-current route (setting of a low-current frequency band) or a high current route (setting of a high current frequency band), based on the variation in voltage detected by the voltage detection unit, the first arc detection unit outputting a corresponding arc detection signal when the arc detection is performed through the low-current route, and the second arc detection unit outputting a corresponding arc detection signal when the arc detection is performed through the high current route, and a circuit interruption unit for interrupting an electrical connection between the power source and a load in response to the arc detection signals output from the first and second arc detection units, the circuit comprising:

a current detection unit disposed on a conductor between the power source and the load, and configured to detect variation in current over time;

a current saturation setting unit for setting a current saturation time of the signal detected by the current detection unit according to load;

a first amplification unit for amplifying a signal output from the current saturation setting unit in a non-inverted manner;

a second amplification unit for amplifying a signal output from the current saturation setting unit in an inverted manner;

a full-wave rectification unit for outputting a full-wave signal by combining half-wave signals output from the first and second amplification units;

a third amplification unit for amplifying the signal output from the full-wave rectification unit;

a first Direct Current (DC) conversion unit for converting a signal output from the third amplification unit into a DC signal;

a first comparison unit for comparing the signal output from the first DC conversion unit with a first reference voltage, determining the output signal of the first DC conversion unit to be a pseudo-arc signal of the low-current route when the output signal is lower than the first reference voltage, and generating an output based on the determination;

a first signal conversion unit for interrupting the output signal of the first arc detection unit when the output based on the determination related to the pseudo-arc signal is generated by the first comparison unit;

a second DC conversion unit for converting the output signal of the full-wave rectification unit into a DC signal;

a second comparison unit for comparing the signal output from the second DC conversion unit with a second reference voltage, determining the output signal of the second DC conversion unit to be a pseudo-arc signal of the high-current route when the output signal is lower than the second reference voltage, and generating an output based on the determination;

a second signal conversion unit for interrupting the output signal of the second arc detection unit when the output based on the determination related to the pseudo-arc signal is generated by the second comparison unit; and

a current branch switching unit configured to interrupt an output of the first comparison unit when an output resulting from the pseudo-arc signal occurs from the second comparison unit, and not to interrupt the output of the first comparison unit when an output resulting from the pseudo-arc signal does not occur from the second comparison unit, after a current route is set according to low current or high current.

2. The circuit as set forth in claim 1, wherein amplifiers constituting the first amplification unit and the second amplification unit share a single power source for power supply voltage.

3. The circuit as set forth in claim 1, wherein the current saturation setting unit comprises a resistor that is connected in series to an end of a current transformer.

4. The circuit as set forth in claim 1, wherein the first amplification unit is configured such that a signal, which is set by a first resistor of the current saturation setting unit and output therethrough, is input to a non-inverting terminal of an amplifier through a second resistor, and an inverting terminal of the amplifier is grounded through third and fourth resistors.

5. The circuit as set forth in claim 1, wherein the second amplification unit is configured such that a signal, which is set by a first resistor of the current saturation setting unit and output therethrough, is input to an inverting terminal of a second amplifier through fifth and sixth resistors, and a non-inverting terminal of the second amplification is ground through a seventh resistor.

6. A circuit for preventing a malfunction of an arc fault detection device, the circuit comprising:

a current detection unit disposed on a conductor between the power source and the load and configured to detect variation in current over time;

a current saturation setting unit for setting a current saturation time of the signal detected by the current detection unit according to load;

a first amplification unit for amplifying a signal output from the current saturation setting unit in a non-inverted manner;

a second amplification unit for amplifying a signal output from the current saturation setting unit in an inverted manner;

a full-wave rectification unit for outputting a full-wave signal by combining half-wave signals output from the first and second amplification units;

a third amplification unit for amplifying the signal output from the full-wave rectification unit;

a first DC conversion unit for converting a signal output from the third amplification unit into a DC signal;

a first comparison unit for comparing the signal output from the first DC conversion unit with a first reference voltage, determining that an overload has occurred over a low-current route, that is, that an overload has occurred over a low load route if a current equal to or lower than 200% of a rated current is detected, when an output signal of the first DC conversion unit is lower than the first reference voltage, and outputting an circuit interruption signal;

a second DC conversion unit for converting the output signal of the full-wave rectification unit in a DC signal; and

a second comparison unit for comparing the signal output from the second DC conversion unit with a second reference voltage, determining that an overload has occurred over a high-current route when a current ranging from 200% to 400% of the rated current is detected, when an output signal of the second DC conversion unit is lower than the second reference voltage, and outputting an circuit interruption signal.