Method for manufacturing semiconductor device

• US 7,446,054 B2
• Filed: 10/25/2004
• Issued: 11/04/2008
• Est. Priority Date: 10/28/2003
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei
• Primary Examiner(s): Lee; Calvin
• Application Number:
  US10/573,160
• Publication Number:
  US 20070042597A1
• Time in Patent Office: 1,471 Days
• Field of Search: 438/680, 438/736, 438/760, 438/782, 438942-951, 438/82, 257/637, 257/750, 257/E29.284, 257/E29.299, 257/37, 257/299
• US Class Current: 438/760
• CPC Class Codes: H01L 21/288 from a liquid, e.g. electrolytic deposition
• CPC Class Codes: H01L 21/76802 by forming openings in dielectrics
• CPC Class Codes: H01L 21/76825 by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc. plasma treatment H01L21/76826
• CPC Class Codes: H01L 21/76826 by contacting the layer with gases, liquids or plasmas
• CPC Class Codes: H01L 21/76831 in via holes or trenches, e.g. non-conductive sidewall liners
• CPC Class Codes: H01L 21/76838 characterised by the formation and the after-treatment of the conductors etching for patterning the conductors H01L21/3213
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76849 the layer being positioned on top of the main fill metal
• CPC Class Codes: H01L 21/76877 Filling of holes, grooves or trenches, e.g. vias, with conductive material
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/1292 using liquid deposition, e.g. printing
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
• CPC Class Codes: H10K 59/12 Active-matrix OLED [AMOLED] displays
• CPC Class Codes: H10K 59/122 Pixel-defining structures or layers, e.g. banks
• CPC Class Codes: H10K 71/00 Manufacture or treatment specially adapted for the organic devices covered by this subclass

Abstract

It is an object of the present invention to provide a method for manufacturing a semiconductor device in which prevention of disconnection due to a step caused by a surface shape before film formation, control of increase in the cost in forming an insulating film over a large-sized substrate, improvement of the usability efficiency of a material, and a reduction in the amount of waste are realized. In the invention, a first insulating film is formed by discharging a composition, a second insulating film is selectively formed over the first insulating film, and an opening is formed by etching the first insulating film by using the second insulating film as a mask. Afterwards, a conductive film is formed by discharging a composition over the opening, and a wiring in a lower layer and a wiring in an upper layer are connected each other with an insulating film therebetween.

Claims

1. A method for manufacturing a semiconductor device, comprising the steps of:

forming a first insulating film by selectively discharging a composition including an insulator;

forming a second insulating film over the first insulating film;

performing light-exposure and development on the second insulating film to form a mask pattern;

forming an opening by etching the first insulating film by using the mask pattern; and

forming a barrier layer by selectively discharging a composition to at least a side surface of the opening.

2. The method for manufacturing a semiconductor device according to claim 1, wherein the opening formed in the first insulating film having a tapered shape, and an inert element is added to the first insulating film.

3. The method for manufacturing a semiconductor device according to claim 2, wherein the inert element is one or plural kinds selected from helium (He), neon (Ne), argon (Ar), krypton (Kr) and xenon (Xe).

4. The method for manufacturing a semiconductor device according to claim 1, wherein an insert element is added to the first insulating film before forming the barrier layer.

5. The method for manufacturing a semiconductor device according to claim 1, wherein a conductive film is formed by discharging a composition over the opening, and wherein a barrier layer is formed by selectively discharging a composition over the conductive film.

6. The method for manufacturing a semiconductor device according to claim 5, wherein the barrier layer comprises a resin including a monomer which comprises a fluorine atom within a molecule, or a resin including a monomer which comprises only a carbon atom and a hydrogen atom.

7. The method for manufacturing a semiconductor device according to claim 1, wherein the barrier layer comprises a resin including a monomer which comprises a fluorine atom within a molecule, or a resin including a monomer which comprises only a carbon atom and a hydrogen atom.

8. The method for manufacturing a semiconductor device according to claim 1, wherein the barrier layer comprises a resin including a monomer which comprises a fluorine atom within a molecule, or a resin including a monomer which comprises only a carbon atom and a hydrogen atom.

9. The method for manufacturing a semiconductor device according to claim 1, wherein the first insulating film comprises a material in which a skeletal structure is configured by the bond of silicon and oxygen.

10. The method for manufacturing a semiconductor device according to claim 1, wherein the first insulating film comprises one or plural kinds selected from polyimide, acrylic, benzocyclobutene and polyamide.

11. The method for manufacturing a semiconductor device according to claim 1, wherein the first insulating film is formed so that the inert gas is included at a concentration of from 1×

10¹⁹ atoms/cm³ to 5×

10²¹ atoms/cm³.

12. The method for manufacturing a semiconductor device according to claim 1, wherein planarizing treatment is performed after forming the first insulating film by discharging a composition comprising an insulator.

13. The method for manufacturing a semiconductor device according to claim 1, wherein a conductive film which fills the opening is formed by discharging a composition including a conductive material to the opening of the first insulating film.

14. The method for manufacturing a semiconductor device according to claim 13, wherein the conductive film comprises a material including silver, gold, copper or indium tin oxide.

15. The method for manufacturing a semiconductor device according to claim 1, wherein the opening formed in the first insulating film having a tapered shape.

16. The method for manufacturing a semiconductor device according to claim 1, wherein an inert element is added the first insulating film.

17. The method of manufacturing an electronic device comprising incorporating into the semiconductor device according to claim 1, wherein the semiconductor device includes a display device, a computer, a cellular phone, a PDA, a camera, or the like.

18. A method for manufacturing a semiconductor device, comprising the steps of:

forming a first insulating film by selectively discharging a composition including an insulator;

forming a second insulating film as a mask pattern by selectively discharging a composition over the first insulating film;

forming an opening by etching the first insulating film by using the mask pattern; and

forming a barrier layer by selectively discharging a composition to at least a side surface of the opening.

19. The method for manufacturing a semiconductor device according to claim 18, wherein the opening formed in the first insulating film having a tapered shape, and an inert element is added to the first insulating film.

20. The method for manufacturing a semiconductor device according to claim 19, wherein the inert element is one or plural kinds selected from helium (He), neon (Ne), argon (Ar), krypton (Kr) and xenon (Xe).

21. The method for manufacturing a semiconductor device according to claim 18, wherein an insert element is added to the first insulating film before forming the barrier layer.

22. The method for manufacturing a semiconductor device according to claim 18, wherein a conductive film is formed by discharging a composition over the opening, and wherein a barrier layer is formed by selectively discharging a composition over the conductive film.

23. The method for manufacturing a semiconductor device according to claim 22, wherein the barrier layer comprises a resin including a monomer which comprises a fluorine atom within a molecule, or a resin including a monomer which comprises only a carbon atom and a hydrogen atom.

24. The method for manufacturing a semiconductor device according to claim 18, wherein the first insulating film comprises one or plural kinds selected from polyimide, acrylic, benzocyclobutene and polyamide.

25. The method for manufacturing a semiconductor device according to claim 18, wherein the first insulating film comprises a material in which a skeletal structure is configured by the bond of silicon and oxygen.

26. The method for manufacturing a semiconductor device according to claim 18, wherein the first insulating film is formed so that the inert gas is included at a concentration of from 1×

10¹⁹ atoms/cm³ to 5×

10²¹ atoms/cm³.

27. The method for manufacturing a semiconductor device according to claim 18, wherein planarizing treatment is performed after forming the first insulating film by discharging a composition comprising an insulator.

28. The method for manufacturing a semiconductor device according to claim 18, wherein a conductive film which fills the opening is formed by discharging a composition including a conductive material to the opening of the first insulating film.

29. The method for manufacturing a semiconductor device according to claim 28, wherein the conductive film comprises a material including silver, gold, copper or indium tin oxide.

30. The method for manufacturing a semiconductor device according to claim 18, wherein the opening formed in the first insulating film having a tapered shape.

31. The method for manufacturing a semiconductor device according to claim 18, wherein an inert element is added the first insulating film.

32. The method of manufacturing an electronic device comprising incorporating into the semiconductor device according to claim 18, wherein the semiconductor device includes a display device, a computer, a cellular phone, a PDA, a camera, or the like.

33. A method for manufacturing a semiconductor device, comprising the steps of:

forming a first insulating film by selectively discharging a composition over a thin film transistor, the composition including an insulator;

forming a second insulating film over the first insulating film;

performing light-exposure and development on the second insulating film to form a mask pattern;

forming at least one opening by etching the first insulating film by using the mask pattern wherein the opening reaches one of source and drain regions of the thin film transistor;

adding an inert element to the first insulating film; and

forming a conductive layer over the first insulating film wherein the conductive layer is connected to the one of the source and drain regions through the opening.

34. The method for manufacturing a semiconductor device according to claim 33, wherein the conductive layer is formed by discharging.

35. The method for manufacturing a semiconductor device according to claim 33, wherein the opening formed in the first insulating film having a tapered shape, and an inert element is added to the first insulating film.

36. The method for manufacturing a semiconductor device according to claim 35, wherein the inert element is one or plural kinds selected from helium (He), neon (Ne), argon (Ar), krypton (Kr) and xenon (Xe).

37. The method for manufacturing a semiconductor device according to claim 33, wherein a barrier layer is formed by selectively discharging a composition to a side surface of the opening.

38. The method for manufacturing a semiconductor device according to claim 37, wherein the barrier layer comprises a resin including a monomer which comprises a fluorine atom within a molecule, or a resin including a monomer which comprises only a carbon atom and a hydrogen atom.

39. The method for manufacturing a semiconductor device according to claim 33, wherein a conductive film is formed by discharging a composition over the opening, and wherein a barrier layer is formed by selectively discharging a composition over the conductive film.

40. The method for manufacturing a semiconductor device according to claim 39, wherein the barrier layer comprises a resin including a monomer which comprises a fluorine atom within a molecule, or a resin including a monomer which comprises only a carbon atom and a hydrogen atom.

41. The method for manufacturing a semiconductor device according to claim 33, wherein the first insulating film comprises one or plural kinds selected from polyimide, acrylic, benzocyclobutene and polyamide.

42. The method for manufacturing a semiconductor device according to claim 33, wherein the first insulating film comprises a material in which a skeletal structure is configured by the bond of silicon and oxygen.

43. The method for manufacturing a semiconductor device according to claim 33, wherein the first insulating film is formed so that the inert gas is included at a concentration of from 1×

10¹⁹ atoms/cm³ to 5×

10²¹ atoms/cm³.

44. The method for manufacturing a semiconductor device according to claim 33, wherein planarizing treatment is performed after forming the first insulating film by discharging a composition comprising an insulator.

45. The method for manufacturing a semiconductor device according to claim 33, wherein a conductive film which fills the opening is formed by discharging a composition including a conductive material to the opening of the first insulating film.

46. The method for manufacturing a semiconductor device according to claim 45, wherein the conductive film comprises a material including silver, gold, copper or indium tin oxide.

47. The method for manufacturing a semiconductor device according to claim 33, wherein the opening formed in the first insulating film having a tapered shape.

48. The method for manufacturing a semiconductor device according to claim 33, wherein an inert element is added the first insulating film.

49. The method of manufacturing an electronic device comprising incorporating into the semiconductor device according to claim 33, wherein the semiconductor device includes a display device, a computer, a cellular phone, a PDA, a camera, or the like.

50. A method for manufacturing a semiconductor device, comprising the steps of:

forming a first insulating film by selectively discharging a composition over a thin film transistor, the composition including an insulator;

forming a second insulating film over the first insulating film;

performing light-exposure and development on the second insulating film to form a mask pattern;

forming at least one opening by etching the first insulating film by using the mask pattern wherein the opening reaches one of source electrode and drain electrode of the thin film transistor;

adding an inert element to the first insulating film; and

forming a conductive layer over the first insulating film wherein the conductive layer is connected to the one of the source electrode and drain electrode through the opening.

51. The method for manufacturing a semiconductor device according to claim 50 wherein the conductive layer is formed by discharging.

52. The method for manufacturing a semiconductor device according to claim 50, wherein the opening formed in the first insulating film having a tapered shape, and an inert element is added to the first insulating film.

53. The method for manufacturing a semiconductor device according to claim 52, wherein the inert element is one or plural kinds selected from helium (He), neon (Ne), argon (Ar), krypton (Kr) and xenon (Xe).

54. The method for manufacturing a semiconductor device according to claim 50, wherein a barrier layer is formed by selectively discharging a composition to a side surface of the opening.

55. The method for manufacturing a semiconductor device according to claim 54, wherein the barrier layer comprises a resin including a monomer which comprises a fluorine atom within a molecule, or a resin including a monomer which comprises only a carbon atom and a hydrogen atom.

56. The method for manufacturing a semiconductor device according to claim 50, wherein a conductive film is formed by discharging a composition over the opening, and wherein a barrier layer is formed by selectively discharging a composition over the conductive film.

57. The method for manufacturing a semiconductor device according to claim 56, wherein the barrier layer comprises a resin including a monomer which comprises a fluorine atom within a molecule, or a resin including a monomer which comprises only a carbon atom and a hydrogen atom.

58. The method for manufacturing a semiconductor device according to claim 50, wherein the first insulating film comprises a material in which a skeletal structure is configured by the bond of silicon and oxygen.

59. The method for manufacturing a semiconductor device according to claim 50, wherein the first insulating film is formed so that the inert gas is included at a concentration of from 1×

10¹⁹ atoms/cm³ to 5×

10²¹ atoms/cm³.

60. The method for manufacturing a semiconductor device according to claim 50, wherein planarizing treatment is performed after forming the first insulating film by discharging a composition comprising an insulator.

61. The method for manufacturing a semiconductor device according to claim 50, wherein a conductive film which fills the opening is formed by discharging a composition including a conductive material to the opening of the first insulating film.

62. The method for manufacturing a semiconductor device according to claim 61, wherein the conductive film comprises a material including silver, gold, copper or indium tin oxide.

63. The method for manufacturing a semiconductor device according to claim 50, wherein the opening formed in the first insulating film having a tapered shape.

64. The method for manufacturing a semiconductor device according to claim 50, wherein the first insulating film comprises one or plural kinds selected from polyimide, acrylic, benzocyclobutene and polyamide.

65. The method for manufacturing a semiconductor device according to claim 50, wherein an inert element is added the first insulating film.

66. The method of manufacturing an electronic device comprising incorporating into the semiconductor device according to claim 50, wherein the semiconductor device includes a display device, a computer, a cellular phone, a PDA, a camera, or the like.

67. A method for manufacturing a semiconductor device, comprising the steps of:

forming a first insulating film by selectively discharging a composition over a thin film transistor, the composition including an insulator;

forming a second insulating film over the first insulating film;

performing light-exposure and development on the second insulating film to form a mask pattern;

forming at least one opening by etching the first insulating film by using the mask pattern wherein the opening reaches one of source and drain regions of the thin film transistor;

adding an inert element to the first insulating film;

forming a conductive layer over the first insulating film wherein the conductive layer is connected to the one of the source and drain regions through the opening; and

forming a pixel electrode electrically connected to the conductive layer.

68. The method for manufacturing a semiconductor device according to claim 67 wherein the conductive layer is formed by discharging.

69. The method for manufacturing a semiconductor device according to claim 67, wherein the opening formed in the first insulating film having a tapered shape, and an inert element is added to the first insulating film.

70. The method for manufacturing a semiconductor device according to claim 69, wherein the inert element is one or plural kinds selected from helium (He), neon (Ne), argon (Ar), krypton (Kr) and xenon (Xe).

71. The method for manufacturing a semiconductor device according to claim 67, wherein a barrier layer is formed by selectively discharging a composition to a side surface of the opening.

72. The method for manufacturing a semiconductor device according to claim 71, wherein the barrier layer comprises a resin including a monomer which comprises a fluorine atom within a molecule, or a resin including a monomer which comprises only a carbon atom and a hydrogen atom.

73. The method for manufacturing a semiconductor device according to claim 67, wherein a conductive film is formed by discharging a composition over the opening, and wherein a barrier layer is formed by selectively discharging a composition over the conductive film.

74. The method for manufacturing a semiconductor device according to claim 73, wherein the barrier layer comprises a resin including a monomer which comprises a fluorine atom within a molecule, or a resin including a monomer which comprises only a carbon atom and a hydrogen atom.

75. The method for manufacturing a semiconductor device according to claim 67, wherein the first insulating film comprises one or plural kinds selected from polyimide, acrylic, benzocyclobutene and polyamide.

76. The method for manufacturing a semiconductor device according to claim 67, wherein the first insulating film comprises a material in which a skeletal structure is configured by the bond of silicon and oxygen.

77. The method for manufacturing a semiconductor device according to claim 67, wherein the first insulating film is formed so that the inert gas is included at a concentration of from 1×

10¹⁹ atoms/cm³ to 5×

10²¹ atoms/cm³.

78. The method for manufacturing a semiconductor device according to claim 67, wherein planarizing treatment is performed after forming the first insulating film by discharging a composition comprising an insulator.

79. The method for manufacturing a semiconductor device according to claim 67, wherein a conductive film which fills the opening is formed by discharging a composition including a conductive material to the opening of the first insulating film.

80. The method for manufacturing a semiconductor device according to claim 79, wherein the conductive film comprises a material including silver, gold, copper or indium tin oxide.

81. The method for manufacturing a semiconductor device according to claim 67, wherein the opening formed in the first insulating film having a tapered shape.

82. The method for manufacturing a semiconductor device according to claim 67, wherein an inert element is added the first insulating film.

83. The method of manufacturing an electronic device comprising incorporating into the semiconductor device according to claim 67, wherein the semiconductor device includes a display device, a computer, a cellular phone, a PDA, a camera, or the like.

84. A method for manufacturing a semiconductor device, comprising the steps of:

forming a first insulating film by selectively discharging a composition over a thin film transistor, the composition including an insulator;

forming a second insulating film over the first insulating film;

performing light-exposure and development on the second insulating film to form a mask pattern;

forming at least one opening by etching the first insulating film by using the mask pattern wherein the opening reaches one of source electrode and drain electrode of the thin film transistor;

adding an inert element to the first insulating film;

forming a conductive layer over the first insulating film wherein the conductive layer is connected to the one of the source electrode and drain electrode through the opening; and

forming a pixel electrode electrically connected to the conductive layer.

85. The method for manufacturing a semiconductor device according to claim 84 wherein the conductive layer is formed by discharging.

86. The method for manufacturing a semiconductor device according to claim 84, wherein the opening formed in the first insulating film having a tapered shape, and an inert element is added to the first insulating film.

87. The method for manufacturing a semiconductor device according to claim 86, wherein the inert element is one or plural kinds selected from helium (He), neon (Ne), argon (Ar), krypton (Kr) and xenon (Xe).

88. The method for manufacturing a semiconductor device according to claim 84, wherein a barrier layer is formed by selectively discharging a composition to a side surface of the opening.

89. The method for manufacturing a semiconductor device according to claim 88, wherein the barrier layer comprises a resin including a monomer which comprises a fluorine atom within a molecule, or a resin including a monomer which comprises only a carbon atom and a hydrogen atom.

90. The method for manufacturing a semiconductor device according to claim 84, wherein a conductive film is formed by discharging a composition over the opening, and wherein a barrier layer is formed by selectively discharging a composition over the conductive film.

91. The method for manufacturing a semiconductor device according to claim 90, wherein the barrier layer comprises a resin including a monomer which comprises a fluorine atom within a molecule, or a resin including a monomer which comprises only a carbon atom and a hydrogen atom.

92. The method for manufacturing a semiconductor device according to claim 84, wherein the first insulating film comprises one or plural kinds selected from polyimide, acrylic, benzocyclobutene and polyamide.

93. The method for manufacturing a semiconductor device according to claim 84, wherein the first insulating film comprises a material in which a skeletal structure is configured by the bond of silicon and oxygen.

94. The method for manufacturing a semiconductor device according to claim 84, wherein the first insulating film is formed so that the inert gas is included at a concentration of from 1×

10¹⁹ atoms/cm³ to 5×

10²¹ atoms/cm³.

95. The method for manufacturing a semiconductor device according to claim 84, wherein planarizing treatment is performed after forming the first insulating film by discharging a composition comprising an insulator.

96. The method for manufacturing a semiconductor device according to claim 84, wherein a conductive film which fills the opening is formed by discharging a composition including a conductive material to the opening of the first insulating film.

97. The method for manufacturing a semiconductor device according to claim 96, wherein the conductive film comprises a material including silver, gold, copper or indium tin oxide.

98. The method for manufacturing a semiconductor device according to claim 84, wherein the opening formed in the first insulating film having a tapered shape.

99. The method for manufacturing a semiconductor device according to claim 84, wherein an inert element is added the first insulating film.

100. The method of manufacturing an electronic device comprising incorporating into the semiconductor device according to claim 84, wherein the semiconductor device includes a display device, a computer, a cellular phone, a PDA, a camera, or the like.