High density trench FET with integrated Schottky diode and method of manufacture

• US 7,446,374 B2
• Filed: 03/24/2006
• Issued: 11/04/2008
• Est. Priority Date: 03/24/2006
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Fairchild Semiconductor Corporation (ON Semiconductor Corporation)
• Inventors: Challa, Ashok, Thorup, Paul, Marchant, Bruce Douglas
• Primary Examiner(s): Nguyen; Dao H
• Application Number:
  US11/388,790
• Publication Number:
  US 20070221952A1
• Time in Patent Office: 956 Days
• Field of Search: 257/328, 257/330, 257/331
• US Class Current: 257/330
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/66727 with a step of recessing the source electrode
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7806 the other device being a Schottky barrier diode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A monolithically integrated trench FET and Schottky diode includes a pair of trenches terminating in a first silicon region of first conductivity type. Two body regions of a second conductivity type separated by a second silicon region of the first conductivity type are located between the pair of trenches. A source region of the first conductivity type is located over each body region. A contact opening extends between the pair of trenches to a depth below the source regions. An interconnect layer fills the contact opening so as to electrically contact the source regions and the second silicon region. Where the interconnect layer electrically contacts the second silicon region, a Schottky contact is formed.

Claims

1. A structure comprising:

a monolithically integrated trench FET and Schottky diode, the monolithically integrated trench FET and Schottky diode comprising;

a pair of trenches terminating in a first silicon region of first conductivity type;

two body regions of a second conductivity type between the pair of trenches, the two body regions being separated by a second silicon region of the first conductivity type;

a source region of the first conductivity type over each body region;

a contact opening extending between the pair of trenches to a depth below the source regions; and

an interconnect layer filling the contact opening so as to electrically contact the source regions and the second silicon region, the interconnect layer forming a Schottky contact with the second silicon region.

2. The structure of claim 1 wherein the first silicon region has a higher doping concentration than the second silicon region.

3. The structure of claim 1 wherein each body region vertically extends between a corresponding source region and the first silicon region, and the interconnect layer electrically contacts the second silicon region at a depth along the bottom half of the body regions.

4. The structure of claim 1 wherein each of the two body regions has a substantially uniform doping concentration.

5. The structure of claim 1 wherein the first silicon region is a first epitaxial layer, and the second silicon region is a second epitaxial layer, the first epitaxial layer extending over a substrate of the first conductivity type, the substrate having a higher doping concentration than the first epitaxial layer, and the first epitaxial layer having a higher doping concentration than the second epitaxial layer.

6. The structure of claim 1 wherein the two body regions and the corresponding source regions are self-aligned to the pair of trenches.

7. The structure for claim 1 further comprising a heavy body region of the second conductivity type formed between the pair of trenches such that the heavy body region electrically contacts each of the two body regions and the second silicon region, the heavy body region having a higher doping concentration than the two body regions.

8. The structure of claim 7 wherein the two body regions, the source regions, and the heavy body region are self-aligned to the pair of trenches.

9. The structure of claim 1 wherein the two body regions and the second silicon region have substantially the same depth.

10. The structure of claim 1 further comprising:

a recessed gate electrode in each trench; and

a dielectric cap insulating each gate electrode from the interconnect layer.

11. The structure of claim 10 further comprising:

a shield electrode in each trench below the recessed gate electrode; and

a shield dielectric insulating the shield electrode from the first silicon region.

12. The structure of claim 10 further comprising:

a thick bottom dielectric extending along a bottom of each trench directly beneath the recessed gate electrode.

13. The structure of claim 1 further comprising a DC to DC synchronous buck converter in which the monolithically integrated trench FET and Schottky diode is coupled to a load as a low-side switch.

14. The structure of claim 1 wherein the interconnect layer is a Schottky barrier metal layer.

15. The structure of claim 1 wherein each of the two body regions forms a pn junction with the second silicon region.

16. The structure of claim 1 wherein the Schottky contact is formed at a depth below the source regions.

17. A structure comprising a monolithically integrated trench MOSFET and Schottky diode, the monolithically integrated trench MOSFET and Schottky diode comprising:

a first epitaxial layer of a first conductivity type;

a second epitaxial layer of the first conductivity type over the first epitaxial layer, the first epitaxial layer having a higher doping concentration than the second epitaxial layer;

a plurality of trenches extending through the second epitaxial layer and terminating in the first epitaxial layer;

two body regions of a second conductivity type between every two adjacent trenches, the two body regions being separated by a portion of the second epitaxial layer;

a source region of the first conductivity type over each body region;

a contact opening extending between every two adjacent trenches to a depth below the source regions; and

a Schottky barrier metal layer filling the contact openings so as to electrically contact the source region and the portion of the second epitaxial layer, the Schottky barrier metal layer forming a Schottky contact with the portion of the second epitaxial layer.

18. The structure of claim 17 wherein each body region vertically extends between a corresponding source region and the first epitaxial layer, and the Schottky barrier metal layer electrically contacts the portion of the second epitaxial layer at a depth along the bottom half of the body regions.

19. The structure of claim 17 wherein each of the two body regions has a substantially uniform doping concentration.

20. The structure of claim 17 wherein the first epitaxial layer extends over a substrate of the first conductivity type, the substrate having a higher doping concentration than the first epitaxial layer.

21. The structure of claim 17 wherein the two body regions and the corresponding source regions are self-aligned to the two adjacent trenches between which they are located.

22. The structure for claim 17 further comprising a plurality of heavy body regions of the second conductivity type formed between every two adjacent trenches such that each heavy body region electrically contacts the two body regions and the portion of the second epitaxial layer located between the two adjacent trenches.

23. The structure of claim 22 wherein the two body regions, the corresponding source regions, and the plurality of heavy body regions are self-aligned to the two adjacent trenches between which they are located.

24. The structure of claim 17 wherein the two body regions and the second epitaxial layer have substantially the same depth.

25. The structure of claim 17 further comprising:

a recessed gate electrode in each trench; and

a dielectric cap insulating each gate electrode from the Schottky barrier metal layer.

26. The structure of claim 25 further comprising:

a shield electrode in each trench below the recessed gate electrode; and

a shield dielectric insulating the shield electrode from the first epitaxial layer.

27. The structure of claim 25 further comprising:

a thick bottom dielectric extending along the bottom of each trench directly beneath the recessed gate electrode.

28. The structure of claim 17 further comprising a DC to DC synchronous buck converter in which the monolithically integrated trench MOSFET and Schottky diode is coupled to a load as a low-side switch.