System for direct acquisition of received signals

• US 7,447,259 B2
• Filed: 04/24/2007
• Issued: 11/04/2008
• Est. Priority Date: 10/11/2002
• Status: Expired due to Term

• Current Assignee: Mitre Corporation
• Original Assignee: Mitre Corporation
• Inventors: Fite, John, Betz, John, Capozza, Paul
• Primary Examiner(s): WANG, TED M
• Application Number:
  US11/790,250
• Publication Number:
  US 20070195867A1
• Time in Patent Office: 560 Days
• Field of Search: 375/152, 375/343, 375/350, 375/142, 375/143, 375/150
• US Class Current: 375/152
• CPC Class Codes: G01S 19/30 code related G01S19/246 takes precedence
• CPC Class Codes: H04B 1/70752 Partial correlation
• CPC Class Codes: H04B 1/708 Parallel implementation
• CPC Class Codes: H04B 1/7093 Matched filter type

Abstract

Signal processing architectures for direct acquisition of spread spectrum signals using long codes. Techniques are described for achieving a high of parallelism, employing code matched filter banks and other hardware sharing. In one embodiment, upper and lower sidebands are treated as two independent signals with identical spreading codes. Cross-correlators, in preferred embodiments, are comprised of a one or more banks of CMFs for computing parallel short-time correlations (STCs) of received signal samples and replica code sequence samples, and a means for calculating the cross-correlation values utilizing discrete-time Fourier analysis of the computed STCs. One or more intermediate quantizers may optionally be disposed between the bank of code matched filters and the cross-correlation calculation means for reducing word-sizes of the STCs prior to Fourier analysis. The techniques described may be used with BOC modulated signals or with any signal having at least two distinct sidebands.

Claims

1. A signal processing apparatus (SPA) for acquiring direct sequence spread spectrum (DSSS) signals, comprising:

a module configured to sample a received DSSS signal at a predetermined sampling rate;

a module configured to cross-correlate, in a parallel fashion, time and frequency shifted versions of the sampled DSSS signal with samples of a locally generated replica of a pseudo random noise (PN) code sequence used to spread a spectrum of the received DSSS signal in order to obtain cross-correlation values; and

a Doppler compensator coupled to the cross-correlating module and configured to process the obtained cross-correlation values to compensate for shifts in at least one of (i) a carrier frequency and (ii) a code rate of the received DSSS signal resulting from time-companding of the received DSSS signal,

wherein the cross-correlating module comprises a bank of code-matched filters configured to compute short-time correlations (STCs) in parallel.

2. The SPA of claim 1, wherein the cross-correlating module further comprises:

a module configured to calculate the cross-correlation values utilizing discrete-time Fourier analysis of the computed STCs.

3. The SPA of claim 2, wherein the cross-correlating module further comprises one or more intermediate quantizers disposed between the bank of code matched filters and the cross-correlation calculation module and configured to reduce word-sizes of the STCs prior to Fourier analysis.

4. The SPA of claim 1, wherein:

the code matched filters compute the STCs for interleaved in-phase (I) and quadrature (Q) components of the sampled DSSS signal in a pipelined fashion, the code matched filters operating at twice the sampling rate; and

each code matched filter has two data shift registers per tap for holding the interleaved components.

5. The SPA of claim 1, wherein:

the DSSS signal has multiple sidebands;

the SPA further comprises a module configured to digitally select and resample two or more of the multiple sidebands;

the cross-correlating module further comprises an interleaver configured to interleaving data of the re-sampled sidebands;

the code matched filters compute the STCs for the interleaved sideband data in a pipelined fashion; and

each code matched filter has additional data shift registers for holding the interleaved sideband data and configured to operate at a rate equal to the product of the number of selected sidebands and the predetermined sampling rate.

6. The SPA of claim 1, wherein the cross-correlating module further comprises:

a module configured to resample the received DSSS signal at a rate equal to an integer multiple of the nominal chip rate;

one or more code matched filters having a plurality of multipliers whose required number is divided by the integer multiple; and

wherein a summing network associated with each code matched filter includes hardware configured to store partial sums and add partial sums from previous clock cycles in computing the cross-correlation values.

7. The SPA of claim 1, wherein the Doppler compensator comprises:

a delay module configured to apply delays to input streams of cross-correlation values corresponding to frequency-shifted versions of the received DSSS signal and the replica code sequence; and

a module configured to select appropriate delays to be applied based upon non-coherent integration counter values.

8. The SPA of claim 7, wherein the module configured to apply frequency-shifted-dependent delays comprises:

one or more integer delay line filters;

one or more fractional delay line filters;

a pre-computed lookup table of filter coefficients for use by the integer delay line filters and fractional delay line filters in determining an appropriate delay to be applied; and

a module configured to initialize and update integer and fractional delay line filter coefficients as a function of externally specified frequency.

9. The SPA of claim 1, further comprising an integrator configured to non-coherently integrate groups of the compensated cross-correlation values representing corresponding time and frequency offsets of different time segments of the received signal and replica code sequence in order to obtain correlation metrics.

10. The SPA of claim 9, wherein the non-coherent integrator comprises:

a module configured to control relative timing between the replica code sequence and the received signal;

a module configured to realign the replica code sequence at the start of a new time uncertainty;

a module configured to integrate multiple correlation blocks; and

wherein code sequence segments overlapping in time between groups of cross-correlation values compensate for invalid samples resulting from Doppler compensation, post peak-detection idle time resulting from a peak being detected at the end of a tile, and a change in the number of samples available for processing as a result of code Doppler effects.

11. The SPA of claim 9, wherein the non-coherent integrator comprises modules configured to:

load and swap code matched filter registers containing consecutive non-contiguous code sequence segments to support the seamless switching between processing multiple blocks of a tile and for controlling the realignment of the received signal to the symbol boundary along with the local reference code when switching time uncertainties;

control initiation of a new block for a given time offset during the NCI process;

control a signal that distinguishes invalid data from the code Doppler processing and the valid data at the end of the NCI process; and

control discarding the unused signal at the end of the NCI processing for a given time uncertainty and coordinating the start of the NCI processing for the next time uncertainty.

12. The SPA of claim 1, further comprising a detector configured to detect whether a sum of the magnitudes of the correlation metrics exceeds a detection threshold.

13. A signal processing apparatus (SPA) for acquiring direct sequence spread spectrum (DSSS) signals, comprising:

a module configured to sample a received DSSS signal at a predetermined sampling rate;

a bank of code matched filters configured to compute in parallel, short-time correlations (STCs) of (i) time and frequency shifted versions of the sampled DSSS signal and (ii) samples of a locally generated replica of a pseudo random noise (PN) code sequence used to spread a spectrum of the received DSSS signal;

a module configured to calculate cross-correlation values based on the computed STCs; and

a Doppler compensator coupled to the calculating module and configured to process the calculated cross-correlation values to compensate for shifts in at least one of (i) a carrier frequency and (ii) a code rate of the received DSSS signal resulting from time-companding of the received DSSS signal.

14. The SPA of claim 13, wherein the calculating module utilizes discrete-time Fourier analysis of the computed STCs.

15. The SPA of claim 13, further comprising one or more intermediate quantizers disposed between the bank of code matched filters and the cross-correlation calculation module and configured to reduce word-sizes of the STCs prior to Fourier analysis.

16. The SPA of claim 13, wherein:

the code matched filters compute the STCs for interleaved in-phase (I) and quadrature (Q) components of the sampled DSSS signal in a pipelined fashion, the code matched filters operating at twice the sampling rate; and

each code matched filter has two data shift registers per tap for holding the interleaved components.

17. The SPA of claim 13, wherein:

the DSSS signal has multiple sidebands;

the SPA further comprises a module configured to digitally select and resample two or more of the multiple sidebands;

the SPA further comprises an interleaver configured to interleave data of the re-sampled sidebands;

the code matched filters compute the STCs for the interleaved sideband data in a pipelined fashion; and

each code matched filter has additional data shift registers for holding the interleaved sideband data and configured to operate at a rate equal to the product of the number of selected sidebands and the predetermined sampling rate.

18. The SPA of claim 13, wherein the calculating module comprises:

a module configured to resample the received DSSS signal at a rate equal to an integer multiple of the nominal chip rate,

wherein at least one of the code match filters has a plurality of multipliers whose required number is divided by the integer multiple; and

wherein an associated summing network of the at least one code matched filter includes hardware for storing partial sums and adding partial sums from previous clock cycles in computing the cross-correlation values.

19. The SPA of claim 13, wherein the Doppler compensator comprises:

a delay module configured to apply delays to input streams of cross-correlation values corresponding to frequency-shifted versions of the received DSSS signal and the replica code sequence; and

a module configured to select appropriate delays to be applied based upon non-coherent integration counter values.

20. The SPA of claim 19, wherein the module configured to apply frequency-shifted-dependent delays further comprises:

one or more integer delay line filters;

one or more fractional delay line filters;

a pre-computed lookup table of filter coefficients for use by the integer delay line filters and fractional delay line filters in determining an appropriate delay to be applied; and

a module configured to initialize and update integer and fractional delay line filter coefficients as a function of externally specified frequency.

21. The SPA of claim 13, further comprising an integrator configured to non-coherently integrate groups of the compensated cross-correlation values representing corresponding time and frequency offsets of different time segments of the received signal and replica code sequence in order to obtain correlation metrics.

22. The SPA of claims 21, wherein the non-coherent integrator comprises:

a module configured to control relative timing between the replica code sequence and the received signal;

a module configured to realign the replica code sequence at the start of a new time uncertainty;

a module configured to integrate multiple correlation blocks; and

wherein code sequence segments overlapping in time between groups of cross-correlation values compensate for invalid samples resulting from Doppler compensation, post peak-detection idle time resulting from a peak being detected at the end of a tile, and a change in the number of samples available for processing as a result of code Doppler effects.

23. The SPA of claim 21, wherein the non-coherent integrator comprises modules configured to:

load and swap code matched filter registers containing consecutive non-contiguous code sequence segments to support the seamless switching between processing multiple blocks of a tile and for controlling the realignment of the received signal to the symbol boundary along with the local reference code when switching time uncertainties;

control initiation of a new block for a given time offset during the NCI process;

control a signal that distinguishes invalid data from the code Doppler processing and the valid data at the end of the NCI process; and

control discarding the unused signal at the end of the NCI processing for a given time uncertainty and coordinating the start of the NCI processing for the next time uncertainty.

24. The SPA of claim 13, further comprising a detector configured to detect whether a sum of the magnitudes of the correlation metrics exceeds a detection threshold.

25. A signal processing apparatus (SPA) for acquiring signals, comprising:

a module configured to sample a received signal to obtain a first sampled signal;

a module configured to cross-correlate, in a parallel fashion, the first sampled signal with time and frequency shifted versions of a second sampled signal to obtain cross-correlation values; and

a Doppler compensator coupled to the cross-correlating means and configured to process the obtained cross-correlation values to compensate for shifts in at least one of (i) a carrier frequency and (ii) a code rate of the received signal resulting from time-companding of the received signal,

wherein the cross-correlation module comprises a bank of code matched filters configured to compute short-time correlations (STCs) in parallel.

26. The SPA of claim 25, wherein the cross-correlating module further comprises:

a module configured to calculate the cross-correlation values utilizing discrete-time Fourier analysis of the computed STCs.

27. The SPA of claim 26, wherein the cross-correlating module further comprises one or more intermediate quantizers disposed between the bank of code matched filters and the cross-correlation calculation means and configured to reduce word-sizes of the STCs prior to Fourier analysis.

28. The SPA of claim 25, wherein:

the code matched filters compute the STCs for interleaved in-phase (I) and quadrature (Q) components of the sampled signal in a pipelined fashion, the code matched filters operating at twice the sampling rate; and

each code matched filter has two data shift registers per tap for holding the interleaved components.

29. The SPA of claim 25, wherein:

the signal has multiple sidebands;

the SPA further comprises a module configured to digitally select and resample two or more of the multiple sidebands;

the cross-correlating module further comprises an interleaver configured to interleave data of the re-sampled sidebands;

the code matched filters compute the STCs for the interleaved sideband data in a pipelined fashion; and

each code matched filter has additional data shift registers for holding the interleaved sideband data and operates at a rate equal to the product of the number of selected sidebands and the predetermined sampling rate.

30. The SPA of claim 25 wherein the cross-correlating module comprises:

a module configured to resample the received signal at a rate equal to an integer multiple of the nominal chip rate;

one or more code matched filters having a plurality of multipliers whose required number is divided by the integer multiple; and

wherein a summing network associated with each code matched filter includes hardware for storing partial sums and adding partial sums from previous clock cycles in computing the cross-correlation values.

31. The SPA of claim 25, wherein the Doppler compensator comprises:

a delay module configured to apply delays to input streams of cross-correlation values corresponding to frequency-shifted versions of the received DSSS signal and the replica code sequence; and

a module configured to select appropriate delays to be applied based upon non-coherent integration counter values.

32. The SPA of claim 31, wherein the module configured to applying frequency-shifted-dependent delays further comprises:

one or more integer delay line filters;

one or more fractional delay line filters;

a pre-computed lookup table of filter coefficients for use by the integer delay line filters and fractional delay line filters in determining an appropriate delay to be applied; and

a module configured to initialize and update integer and fractional delay line filter coefficients as a function of externally specified frequency.

33. The SPA of claim 25, further comprising an integrator configured to non-coherently integrate groups of the compensated cross-correlation values representing corresponding time and frequency offsets of different time segments of the received signal and replica code sequence in order to obtain correlation metrics.

34. The SPA of claim 33, wherein the non-coherent integrator comprises:

a module configured to control relative timing between the replica code sequence and the received signal;

a module configured to realign the replica code sequence at the start of a new time uncertainty;

a module configured to integrate multiple correlation blocks; and

wherein code sequence segments overlapping in time between groups of cross-correlation values compensate for invalid samples resulting from Doppler compensation, post peak-detection idle time resulting from a peak being detected at the end of a tile, and a change in the number of samples available for processing as a result of code Doppler effects.

35. The SPA of claim 34, wherein the non-coherent integrator further comprises modules configured to:

load and swap of code matched filter registers containing consecutive non-contiguous code sequence segments to support the seamless switching between processing multiple blocks of a tile and for controlling the realignment of the received signal to the symbol boundary along with the local reference code when switching time uncertainties;

control initiation of a new block for a given time offset during the NCI process;

control a signal that distinguishes invalid data from the code Doppler processing and the valid data at the end of the NCI process; and

control discarding the unused signal at the end of the NCI processing for a given time uncertainty and coordinating the start of the NCI processing for the next time uncertainty.

36. The SPA of claim 25, further comprising a detector configured to detect whether a sum of the magnitudes of the correlation metrics exceeds a detection threshold.

37. A signal processing apparatus (SPA) for acquiring signals, comprising:

a module configured to sample a received signal at a predetermined sampling rate;

a bank of code matched filters configured to compute, entirely in parallel, short-time correlations (STCs) of (i) time and frequency shifted versions of the sampled signal and (ii) samples of a locally generated replica of a pseudo random noise (PN) code sequence used to spread a spectrum of the received signal;

a module configured to calculate cross-correlation values based on the computed STCs; and

a Doppler compensator coupled to the calculating module and configured to process the calculated cross-correlation values to compensate for shifts in at least one of (i) a carrier frequency and (ii) a code rate of the received signal resulting from time-companding of the received signal.

38. The SPA of claim 37, wherein the calculating module utilizes discrete-time Fourier analysis of the computed STCs.

39. The SPA of claim 37, wherein:

the code matched filters are configured to compute the STCs for interleaved in-phase (I) and quadrature (Q) components of the sampled signal in a pipelined fashion, the code matched filters operating at twice the sampling rate; and

each code matched filter has two data shift registers per tap for holding the interleaved components.

40. The SPA of claim 37, wherein:

the received signal has multiple sidebands;

the SPA further comprises a module configured to digitally select and resample two or more of the multiple sidebands;

the SPA further comprises an interleaver configured to interleave data of the re-sampled sidebands;

the code matched filters are configured to compute the STCs for the interleaved sideband data in a pipelined fashion; and

each code matched filter has additional data shift registers for holding the interleaved sideband data and operate at a rate equal to the product of the number of selected sidebands and the predetermined sampling rate.

41. The SPA of claim 37, wherein the calculating module comprises:

a module configured to resample the received signal at a rate equal to an integer multiple of the nominal chip rate,

wherein at least one of the code match filters has a plurality of multipliers whose required number is divided by the integer multiple; and

wherein an associated summing network of the at least one code matched filter includes hardware for storing partial sums and adding partial sums from previous clock cycles in computing the cross-correlation values.

42. The SPA of claim 37, wherein the Doppler compensator comprises:

a delay module configured to apply delays to input streams of cross-correlation values corresponding to frequency-shifted versions of the received DSSS signal and the replica code sequence; and

a module configured to select appropriate delays to be applied based upon non-coherent integration counter values.

43. The SPA of claim 37, further comprising an integrator configured to non-coherently integrate groups of the compensated cross-correlation values representing corresponding time and frequency offsets of different time segments of the received signal and replica code sequence in order to obtain correlation metrics.

44. The SPA of claim 37, further comprising a detector configured to detect whether a sum of the magnitudes of the correlation metrics exceeds a detection threshold.