Circuitry for a programmable element

• US 7,450,450 B2
• Filed: 11/13/2006
• Issued: 11/11/2008
• Est. Priority Date: 09/11/2001
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Cowles, Timothy B.
• Primary Examiner(s): Pham; Ly D
• Application Number:
  US11/599,224
• Publication Number:
  US 20070070679A1
• Time in Patent Office: 729 Days
• Field of Search: 327/538, 327/540, 327/541, 327/543, 365/164, 365/225.7, 365/63, 365/96, 365/189.05, 365/201
• US Class Current: 365/201
• CPC Class Codes: G11C 17/16 using electrically-fusible links
• CPC Class Codes: G11C 17/18 Auxiliary circuits, e.g. for writing into memory
• CPC Class Codes: G11C 2207/105 Aspects related to pads, pins or terminals

Abstract

As part of anti-fuse circuitry for a memory device, a preferred exemplary embodiment of the current invention provides a direct connection between an anti-fuse and a contact pad used to provide voltage to that anti-fuse. The contact pad also serves as a voltage source for at least one other part of the memory device. At least one circuit coupled to the anti-fuse is temporarily isolated from it in the event that a voltage present at the pad would damage the circuit or cause the circuit to improperly read the status of the anti-fuse. The contact pad is available during a probe stage of the in-process memory device, but once the device is packaged, access to that contact pad is prevented. At the backend of the production process, the anti-fuse may be accessed through a second pad, whose electrical communication with the anti-fuse is regulated.

Claims

1. A method of configuring a semiconductor die, comprising:

sharing a die terminal between a first device on the die and a second device on the die, wherein the first device is configured to receive a voltage through the die terminal and, wherein the sharing act comprises sharing the die terminal between an equilibration circuit and an anti-fuse, wherein the equilibration circuit is configured to receive a margin-testing voltage through the die terminal;

allowing unregulated electrical communication between the die terminal and the second device, wherein an act of determining a status of the second device while the voltage is present at the die terminal is indeterminable of the status; and

preventing the act of determining while the voltage is present at the die terminal.

2. The method in claim 1, further comprising:

including a circuit on the die, wherein the circuit is configured to perform the act of determining; and

isolating the circuit from the second device while the voltage is present.

3. The method in claim 2, wherein the isolating act comprises:

electrically interposing a transistor between the circuit and the second device; and

preventing electrical communication between the circuit and the second device using the transistor.

4. The method in claim 3, wherein the act of preventing electrical communication comprises turning off the transistor in direct response to the voltage being present at the die terminal.