Cycle count storage methods
First Claim
Patent Images
1. A method of using a hot count in a flash memory system including a NAND flash memory array on a first substrate and a memory controller on a second substrate, the NAND flash memory array having a minimum unit of erase of a block, a block containing two or more pages, where a page is a minimum unit of programming, comprising:
- receiving, at the first substrate, an erase command from the memory controller on the second substrate;
reading the hot count from the block, the hot count representing the number of times the block has been erased;
comparing the hot count with a predetermined value stored in a comparing circuit on the first substrate, the comparing performed by the comparing circuit on the first substrate; and
if the hot count exceeds the predetermined value then changing an operating condition of the block.
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Abstract
A hot count records the number of erase operations experienced by a block. The hot count is stored in an overhead data area of the block and is updated by circuits located on the same substrate as the block. Where a memory has two or more planes, each plane has circuits for updating hot counts.
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Citations
21 Claims
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1. A method of using a hot count in a flash memory system including a NAND flash memory array on a first substrate and a memory controller on a second substrate, the NAND flash memory array having a minimum unit of erase of a block, a block containing two or more pages, where a page is a minimum unit of programming, comprising:
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receiving, at the first substrate, an erase command from the memory controller on the second substrate; reading the hot count from the block, the hot count representing the number of times the block has been erased; comparing the hot count with a predetermined value stored in a comparing circuit on the first substrate, the comparing performed by the comparing circuit on the first substrate; and if the hot count exceeds the predetermined value then changing an operating condition of the block. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method of managing erase blocks of a NAND flash memory array formed on a first substrate, the array under the control of a controller on a second substrate, the NAND flash memory array having a minimum unit of erase of a block, a block including two or more pages, comprising:
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receiving, at the first substrate, an erase command from the controller on the second Substrate; reading a hot count value from a block, the hot count value representing the number of times the block has been erased; storing the hot count value in a register that is located on the first substrate; comparing the hot count value with a predetermined value, the comparing performed on the first substrate; if the hot count value does not exceed the predetermined value then erasing all the data in the block, incrementing the hot count value and writing the incremented hot count value to the block; and if the hot count value exceeds the predetermined value then recording that the block is not for subsequent storage of data. - View Dependent Claims (8, 9, 10, 11, 12, 13, 14, 15)
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16. A method of operating a flash memory array having a minimum unit of erase of a block, the memory array having a plurality of planes including at least a first plane and a second plane, each of the plurality of planes having its own row and column decoder circuits, comprising:
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maintaining a first hot count for a first block in the first plane by copying a first hot count value from the first block to a first register, incrementing the first hot count value, erasing the first block and writing the incremented first hot count value to the first block, the erasing is in response to a request from a controller, the plurality of planes is on one or more memory chips and the controller is on a separate controller chip; comparing the first hot count value to a threshold value and operating the first block in a first mode if the first hot count value is less than the threshold value and operating the first block in a second mode if the first hot count value is greater than the threshold value, the comparing the first hot count value to a threshold value is performed by circuits on the one or more memory chips; maintaining a second hot count for a second block in the second plane by copying a second hot count value from the second block to a second register, incrementing the second hot count value, erasing the second block and writing the incremented second hot count value to the second block; and comparing the second hot count value to the threshold value and operating the second block in a first mode if the second hot count value is less than the threshold value and operating the second block in a second mode if the second hot count value is greater than the threshold value, the comparing the second hot count to the threshold value is performed by circuits on the one or more memory chips. - View Dependent Claims (17, 18, 19, 21)
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20. The method of 16 wherein the flash memory array is a NAND array.
Specification