Strap assembly comprising functional block deposited therein and method of making same

• US 7,452,748 B1
• Filed: 06/22/2005
• Issued: 11/18/2008
• Est. Priority Date: 11/08/2004
• Status: Expired due to Fees

• Current Assignee: RUIZHANG TECHNOLOGY LIMITED COMPANY
• Original Assignee: Alien Technology Corporation
• Inventors: Craig, Gordon S. W., Tootoonchi, Ali A., Herrmann, Scott, Gengel, Glenn, Eisenhardt, Randy
• Primary Examiner(s): HOANG, QUOC DINH
• Application Number:
  US11/159,550
• Time in Patent Office: 1,245 Days
• Field of Search: 438/107, 438/108, 438/113, 438/128, 438/456, 298/46, 257/E21.511
• US Class Current: 438/108
• CPC Class Codes: G06K 19/07718 the record carrier being manufactured in a continuous process, e.g. using endless rolls
• CPC Class Codes: G06K 19/07749 the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
• CPC Class Codes: G06K 19/07752 using an interposer
• CPC Class Codes: G06K 19/07756 the connection being non-galvanic, e.g. capacitive
• CPC Class Codes: H01L 2223/6677 for antenna, e.g. antenna included within housing of semiconductor device antennas per se H01Q
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/20 Structure, shape, material or disposition of high density interconnect preforms
• CPC Class Codes: H01L 2224/24227 the HDI interconnect not connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the semiconductor or solid-state body being mounted in a cavity or on a protrusion of the item
• CPC Class Codes: H01L 2224/76155 Jetting means, e.g. ink jet
• CPC Class Codes: H01L 2224/82 by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
• CPC Class Codes: H01L 2224/82102 using jetting, e.g. ink jet
• CPC Class Codes: H01L 2224/83136 involving guiding structures, e.g. spacers or supporting members
• CPC Class Codes: H01L 2224/83851 being an anisotropic conductive adhesive
• CPC Class Codes: H01L 2224/95085 being a liquid, e.g. for fluidic self-assembly
• CPC Class Codes: H01L 2224/95122 by applying vibration
• CPC Class Codes: H01L 2224/95136 involving guiding structures, e.g. shape matching, spacers or supporting members
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 24/19 Manufacturing methods of high density interconnect preforms
• CPC Class Codes: H01L 24/24 of an individual high density interconnect connector
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 24/95 : at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
• CPC Class Codes: H01L 24/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/50 : Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 29/0657 : characterised by the shape of the body
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00011 : Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/0102 : Calcium [Ca]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01024 : Chromium [Cr]
• CPC Class Codes: H01L 2924/01027 : Cobalt [Co]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01055 : Cesium [Cs]
• CPC Class Codes: H01L 2924/01057 : Lanthanum [La]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01075 : Rhenium [Re]
• CPC Class Codes: H01L 2924/01077 : Iridium [Ir]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/10158 : at the passive surface
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15153 : the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2924/15155 : the shape of the recess being other than a cuboid
• CPC Class Codes: H01L 2924/15157 : Top view
• CPC Class Codes: H01L 2924/15165 : Monolayer substrate
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H01L 2924/30105 : Capacitance
• CPC Class Codes: H01L 2924/30107 : Inductance
• CPC Class Codes: H01L 2924/3011 : Impedance
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: Y10T 29/53178 : Chip component

Abstract

Methods and apparatuses for an electronic assembly. The method comprises depositing a functional block into a recessed region, forming dielectric layer selectively over at least one of a selected portion of the functional block and a selected portion of the first substrate; and forming one or more electrical interconnections to the functional block. The recessed region is formed on a first substrate. The depositing of the functional block occurs on a continuous web line and using a Fluidic Self Assembly process. The functional block has a width-depth aspect ratio that substantially matches a width-depth aspect ratio of said recessed region which is one of equal to or less than 10.5:1, and equal to or less than 7.5:1.

Claims

1. A method comprising:

depositing a functional block into a recessed region, said recessed region formed on a first substrate, said depositing occurs on the first substrate being a continuous web line and using a Fluidic Self Assembly process, said functional block has a width-depth aspect ratio that substantially matches a width-depth aspect ratio of said recessed region which is one of equal to or less than 10.5;

1, and equal to or less than 7.5;

1;

forming a dielectric layer selectively over at least one of a selected portion of said functional block and a selected portion of said first substrate;

forming one or more electrical interconnections to said block; and

attaching said first substrate to a second substrate having formed thereon a conductor pattern, wherein said one or more electrical interconnections are interconnecting to said conductor pattern.

2. The method of claim 1 further comprising:

attaching said first substrate to a second substrate having formed thereon a conductor pattern, wherein said one or more electrical interconnections are interconnecting to said conductor pattern, and wherein said first substrate is attached to said second substrate in a flip-chip format.

3. The method of claim 1 wherein said first substrate is part of a first web material, wherein said second substrate is part of a second web material, and wherein said method further comprising:

cutting said first substrate and said second substrate from said web materials after said first substrate is attached to said second substrate.

4. The method of claim 1 further comprising:

forming the dielectric layer using a direct writing technique.

5. The method of claim 4 wherein said pad conductors are formed by direct writing.

6. The method of claim 1 further comprising:

forming vias in the dielectric layer where necessary to electrically connect to the functional block.

7. The method of claim 1 further comprising:

forming vias in the dielectric layer where necessary to electrically connect to the functional block;

forming via conductors in the vias;

forming leads that connect to the via conductors using a direct write technique; and

forming pad conductors that connect to said leads.

8. The method of claim 7 wherein said via conductors are formed by a direct write technique.

9. The method of claim 1 further comprising:

forming vias in the dielectric layer where necessary to electrically connect to the functional block;

forming via conductors in the vias; and

forming pad conductors that connect to said via conductors, said pad conductors are formed using a direct write technique.

10. The method of claim 1 wherein depositing said functional block into said recessed region, forming said dielectric layer, and forming said interconnections occur on a continuously moving process and on a same machine.

11. The method of claim 1 further comprising:

forming a lead conductor that connects to a contact pad provided on the functional block using a direct write technique; and

forming a pad conductor that connects to said lead conductor.

12. The method of claim 11 wherein said pad conductor is formed by direct writing.

13. The method of claim 11 further comprising:

coupling said pad conductor to a conductor pattern formed on a second substrate.

14. The method of claim 1 further comprising:

forming a pad conductor that connects to a contact pad provided on the functional block using a direct write technique to establish electrical interconnection to the functional block.

15. The method of claim 14 wherein said pad conductor is formed by direct writing.

16. The method of claim 14 further comprising:

coupling said pad conductor to a conductor pattern formed on a second substrate.

17. The method of claim 1 further comprising:

forming said recessed region on said first substrate prior to depositing said functional block into said recessed region, wherein forming said recessed region, depositing said functional block, forming said dielectric layer, and forming said interconnections occur on a continuously moving process and on a same machine.

29. The method of claim 17 further comprising:

forming a pad conductor that connects to a contact pad provided on the functional block using a direct write technique to establish electrical interconnection to the functional block.

30. The method of claim 29 wherein said pad conductor is formed by direct writing.

31. The method of claim 30 further comprising:

coupling said pad conductor to a conductor pattern formed on a second substrate.

18. A method comprising:

depositing a functional block into a recessed region, said recessed region formed on a first substrate, said depositing occurs on a continuous web line and using a Fluidic Self Assembly process, said functional block has a width-depth aspect ratio that substantially matches a width-depth aspect ratio of said recessed region which is one of equal to or less than 10.5;

1, and equal to or less than 7.5;

1;

forming dielectric layer selectively over at least one of a selected portion of said functional block and a selected portion of said first substrate;

forming one or more electrical interconnections to said block; and

coupling said functional block to an antenna formed on a second substrate and

coupling said electrical interconnections to said antenna.

19. A method comprising:

depositing a functional block onto a web substrate configured to receive said functional block;

using direct writing to form a dielectric layer over a selected area of at least one of said functional block or said web substrate;

forming one or more interconnects to said functional block; and

coupling said functional block to an antenna formed on a second substrate and coupling said electrical interconnections to said antenna.

20. The method of claim 19 wherein said web substrate moves continuously during depositing said functional block, forming said dielectric layer, and forming said interconnects.

21. The method of claim 19 wherein said functional block has a shape selected from a group consisting of square, rectangular, trapezoid, cylinder, and wherein said shape is symmetrical or asymmetrical.

22. The method of claim 19 wherein said interconnects are formed using a direct writing technique.

23. The method of claim 19 wherein forming said interconnects further comprising:

forming one or more vias into said dielectric layer;

forming a via conductor in each of said vias; and

forming a pad conductor coupled to said via conductor.

24. The method of claim 19 wherein any one or both of said via conductor and said pad conductor are formed using a direct writing technique.

25. The method of claim 19 wherein said via conductor is formed by direct writing on said functional block prior to said dielectric layer being formed, wherein said dielectric layer is formed around said via conductor, and wherein said pad conductor is formed after said dielectric layer is formed.

26. The method of claim 19 wherein said web substrate includes one or more sections, each of said sections comprises a plurality of recessed receptors, and each of said sections is separated from another one of said section by a step-change that is consistent and uniform from one step-change to the next.

27. The method of claim 19 further comprising:

forming a lead conductor that connects to a contact pad provided on the functional block using a direct write technique; and

forming a pad conductor that connects to said lead conductor.

28. The method of claim 27 wherein said pad conductor is formed by direct writing.

32. The method of claim 19 further comprising:

forming a recessed region on said web substrate prior to depositing said functional block into said recessed region, wherein forming said recessed region, depositing said functional block, forming said dielectric layer, and forming said interconnections occur on a continuously moving process and on a same machine.

33. The method of claim 19 wherein the functional block is deposited onto the web substrate using a Fluidic Self Assembly process, and wherein the web substrate includes a recessed region configured to receive the functional block.

34. The method of claim 33 wherein the depositing of said functional block, the forming of said dielectric layer and the forming of said interconnects occur on a same machine.

35. The method of claim 33 wherein the functional block comprises an integrated circuit for an RFID and wherein the functional block, after being deposited, forms an RFID strap.

36. A method comprising:

depositing a functional block onto a web substrate configured to receive said functional block;

using direct writing to form a dielectric layer over a selected area of at least one of said functional block or said web substrate;

forming one or more interconnects to said functional block;

forming a lead conductor that connects to a contact pad provided on the functional block using a direct write technique;

forming a pad conductor that connects to said lead conductor; and

coupling said pad conductor to a conductor pattern formed on a second substrate.