Electroless copper fill process
First Claim
1. A method of filling features on a substrate surface, the method comprising(a) providing a substrate having recessed features formed on a surface thereof;
- (b) contacting at least the recessed features of the substrate surface with an electroless plating bath and allowing electroless deposition of a conductive material to proceed for a first period of time;
(c) removing the substrate from the electroless plating bath; and
(d) repeating the contacting and removing of (b) and (c) to at least partially fill the recessed features with the conductive material.
1 Assignment
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Accused Products
Abstract
Disclosed is a procedure for bottom-up fill of electroless copper film in sub-micron integrated circuit features. By repeatedly placing an integrated circuit wafer in an electroless bath, a transient period of time of accelerated growth in the feature is repeated to achieve many small layers of deposition, each of which is thicker near the base of the feature. The net result is filing of the feature from the bottom-up fill without formation of voids. The electroless bath employed to form the continuous electroless copper film may include a reducing agent, a complexing agent, a source of copper ions, a pH adjuster, and optionally one or more surfactants and/or stabilizers.
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Citations
23 Claims
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1. A method of filling features on a substrate surface, the method comprising
(a) providing a substrate having recessed features formed on a surface thereof; -
(b) contacting at least the recessed features of the substrate surface with an electroless plating bath and allowing electroless deposition of a conductive material to proceed for a first period of time; (c) removing the substrate from the electroless plating bath; and (d) repeating the contacting and removing of (b) and (c) to at least partially fill the recessed features with the conductive material. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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18. A method of filling Damascene features in a partially fabricated integrated circuit, the method comprising:
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(a) immersing the partially fabricated integrated circuit, or at least a portion thereof containing the Damascene features, in an electroless copper plating bath comprising a polymer suppressing molecule; (b) removing the partially fabricated integrated circuit, or at least a portion thereof, from the bath after a period of time; (c) re-immersing the partially fabricated integrated circuit, or at least a portion thereof containing the Damascene features, in the electroless copper plating bath comprising the polymer suppressing molecule; and (d) again removing the partially fabricated integrated circuit, or at least a portion thereof, from the bath after a period of time. - View Dependent Claims (19, 20, 21, 22, 23)
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Specification