D/A converter circuit, organic EL drive circuit, and organic EL display

• US 7,456,767 B2
• Filed: 03/28/2005
• Issued: 11/25/2008
• Est. Priority Date: 03/29/2004
• Status: Active Grant

• Current Assignee: ROHM Co., Ltd.
• Original Assignee: ROHM Co., Ltd.
• Inventors: Fujisawa, Masanori, Maede, Jun, Abe, Shinichi, Fujikawa, Akio
• Primary Examiner(s): JEANGLAUDE, JEAN BRUNER
• Application Number:
  US10/594,703
• Publication Number:
  US 20070273566A1
• Time in Patent Office: 1,338 Days
• Field of Search: 341/135, 341/144, 341/145, 345/89, 348/572, 315/169.1
• US Class Current: 341/135
• CPC Class Codes: G09G 2310/027 Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
• CPC Class Codes: G09G 3/3283 in which the data driver supplies a variable data current for setting the current through, or the voltage across, the light-emitting elements
• CPC Class Codes: H03M 1/68 with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits
• CPC Class Codes: H03M 1/745 with weighted currents

Abstract

A D/A converter circuit includes a first current mirror circuit and a second current mirror circuit. The first current mirror circuit has a plurality of output side transistors provided correspondingly to digits of data to be converted and generates en analog current by obtaining, in at least one of the output side transistors, a current corresponding to the weight of the digit of the data being converted. The second current mirror circuit is connected on an upstream or downstream side of the output side transistors and corresponding to a lower digit of the data. An analog current is generated with the second current mirror circuit by obtaining a current corresponding to a weight of a digit that is less than 1.

Claims

1. A D/A converter circuit, which includes a first current mirror circuit having a plurality of output side transistors provided correspondingly to digits of data to be converted and generates an analog current by obtaining in at least one of the output side transistors a current corresponding to weight of a digit of the data, comprising:

a second current mirror circuit connected on an upstream or downstream side of at least one of the output side transistors corresponding to a lower digit of the data, wherein an operating current ratio of the output side transistor of the second current mirror circuit with respect to an input side transistor thereof is set to n;

1(where n is a positive integer) and the analog current is generated by obtaining a current corresponding to a weight of the lower digit, which is less than 1, on the output side transistor of the second current mirror circuit.

2. A D/A converter circuit as claimed in claim 1, wherein the current corresponding to the weight of the lower digit which is less than 1 is outputted to an output terminal of the D/A converter circuit as corresponding to at least one of the lower digits of the data to be converted.

3. A D/A converter circuit as claimed in claim 2, further comprising a constant bias circuit, wherein voltages of the output electrodes of the input side transistor and the output side transistors of the second current mirror circuit are set to a predetermined constant voltage by the constant voltage bias circuit.

4. A D/A converter circuit as claimed in claim 3, wherein the constant voltage bias circuit includes a constant voltage circuit and a plurality of transistors which are connected in series with the input side transistor and the output side transistors of the second current mirror circuit, respectively, the voltage the output electrodes are set to the constant voltage by setting gates or bases of the plurality of the transistors in series with the input and output side transistors to a predetermined constant voltage by the constant voltage circuit.

5. A D/A converter circuit as claimed in claim 4, wherein the data to be converted is m-bit data, m/2 is used as the digit having a weight of 1 when m is an even number, a center digit is used as the digit having a weight of 1 when m is an odd number, the second current mirror circuit is provided for each of the digits having weights less than 1 and n is selected correspondingly to the digit having weights less than 1, respectively.

6. A D/A converter circuit as claimed in claim 3, wherein the input side transistor and the output side transistors of the second current mirror circuit and the plurality of the transistors connected in series with the input and output side transistors are MOS transistors, respectively, and values of the currents, which are obtained by dividing the operating currents of the second current mirror circuit by powers of 2, are distributed to the output side transistors of the second current mirror circuit and outputted to the output terminals, respectively.

7. A D/A converter circuit as claimed in claim 3, wherein the input side transistor and the output side transistors of the second current mirror circuit and the plurality of the transistors connected in series with the input and output side transistors are MOS transistors, respectively, and the constant voltage bias circuit includes a voltage follower for connecting the output electrode of the output side transistor of the second current mirror circuit to the output electrodes of the input side transistor.

8. A D/A converter circuit as claimed in claim 6, wherein the data to be converted is 8 bits or more.

9. A D/A converter circuit as claimed in claim 6, wherein the data to be converted is a gamma corrected display data of 8 bits or more.

10. An organic EL drive circuit wherein the data to be converted in claim 1 is a display data and an organic EL element is driven by an output current of a D/A converter circuit.

11. An organic EL drive circuit comprising a D/A converter circuit as claimed in claim 1 and a current source driven by an output current of the D/A converter circuit, for driving an organic EL element, where the data to be converted.

12. An organic EL display device comprising an organic EL drive circuit claimed in claim 10.