Transistor structures

• US 7,459,757 B2
• Filed: 01/15/2002
• Issued: 12/02/2008
• Est. Priority Date: 08/07/2000
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Sandhu, Gurtej S., Rueger, Neal R., Moore, John T.
• Primary Examiner(s): MENZ, LAURA MARY
• Application Number:
  US10/050,348
• Publication Number:
  US 20020094620A1
• Time in Patent Office: 2,513 Days
• Field of Search: 438/585, 438/407, 438/287, 438/261, 438/300, 438/301, 438/302, 438/303, 438/304, 438/305, 438/308, 438/526, 438/775, 257/640, 257/760, 257/369, 257/325, 257/409, 257/405, 257410-411
• US Class Current: 257/405
• CPC Class Codes: H01L 21/02332 into an oxide layer, e.g. changing SiO to SiON
• CPC Class Codes: H01L 21/0234 treatment by exposure to a plasma
• CPC Class Codes: H01L 21/265 producing ion implantation
• CPC Class Codes: H01L 21/28061 the conductor comprising a metal or metal silicide formed by deposition, e.g. sputter deposition, i.e. without a silicidation reaction H01L21/28052 takes precedence
• CPC Class Codes: H01L 21/28167 on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
• CPC Class Codes: H01L 21/28185 with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
• CPC Class Codes: H01L 21/28202 in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
• CPC Class Codes: H01L 21/3144 on silicon
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
• CPC Class Codes: H01L 29/6659 with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
• CPC Class Codes: H01L 29/7833 with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's for thin film transistors H01L29/78618

Abstract

The invention encompasses a method of incorporating nitrogen into a silicon-oxide-containing layer. The silicon-oxide-containing layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer. The nitrogen is subsequently thermally annealed within the layer to bond at least some of the nitrogen to silicon within the layer. The invention also encompasses a method of forming a transistor. A gate oxide layer is formed over a semiconductive substrate. The gate oxide layer comprises silicon dioxide. The gate oxide layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer, and the layer is maintained at less than or equal to 400° C. during the exposing. Subsequently, the nitrogen within the layer is thermally annealed to bond at least a majority of the nitrogen to silicon. At least one conductive layer is formed over the gate oxide layer. Source/drain regions are formed within the semiconductive substrate, and are gatedly connected to one another by the at least one conductive layer. The invention also encompasses transistor structures.

Claims

1. A transistor structure, comprising:

a gate oxide layer on a semiconductive substrate, the gate oxide layer comprising silicon dioxide and having a total thickness of 5 Angstroms;

the gate oxide layer having a nitrogen-enriched region which is only in an upper half of the gate oxide layer;

a conductive layer on the gate oxide layer; and

source/drain regions within the semiconductive substrate;

the source/drain regions being gatedly connected to one another by the conductive layer.

2. The structure of claim 1 wherein the conductive layer comprises conductively-doped silicon.

3. The structure of claim 1 wherein the conductive layer comprises p-type conductively-doped silicon.