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Low cost high density rectifier matrix memory

  • US 7,460,384 B2
  • Filed: 09/19/2005
  • Issued: 12/02/2008
  • Est. Priority Date: 06/22/2000
  • Status: Expired due to Fees
First Claim
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1. An electronic array circuit comprising:

  • a plurality of generally parallel rows and a plurality of generally parallel columns that are generally orthogonal and overlapping;

    test circuitry comprising connections between the alternate ends of every evenly numbered row such that continuity of half of the rows can be tested by passing a current;

    test circuitry further comprising connections between the alternate ends of every oddly numbered row such that continuity of the other half of the rows can be tested by passing a current.

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