Voltage supply circuit and semiconductor memory

• US 7,460,416 B2
• Filed: 03/01/2007
• Issued: 12/02/2008
• Est. Priority Date: 06/27/2005
• Status: Active Grant

• Current Assignee: Socionext Inc.
• Original Assignee: Fujitsu Limited
• Inventors: Takeuchi, Atsushi
• Primary Examiner(s): Ho; Hoai V
• Application Number:
  US11/712,424
• Publication Number:
  US 20070159896A1
• Time in Patent Office: 642 Days
• Field of Search: 365/189.09, 365/230, 365/226, 327/530
• US Class Current: 365/189.09
• CPC Class Codes: G11C 11/4074 Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
• CPC Class Codes: G11C 11/4094 Bit-line management or control circuits
• CPC Class Codes: G11C 2207/2227 Standby or low power modes
• CPC Class Codes: G11C 5/14 Power supply arrangements , e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
• CPC Class Codes: G11C 7/12 Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines

Abstract

Each of first and second differential amplifiers has a function of increasing a bias current in response to the activation of a drivability control signal. A first driving circuit connects an output node to a high power supply line in response to the activation of an output signal of the first differential amplifier, and connects the output node to a low power supply line in response to the activation of an output signal of the second differential amplifier. Only during the activation period of the drivability control signal, a second driving circuit connects the output node to the high power supply line in response to the activation of the output signal of the first differential amplifier, and connects the output node to the low power supply line in response to the activation of the output signal of the second differential amplifier.

Claims

1. A voltage supply circuit comprising a first voltage supply part and a second voltage supply part that are provided in parallel with respect to an output node, wherein:

said first voltage supply part includes

a first differential amplifier that receives a voltage of said output node and a first voltage as input voltages, and activates its output signal when the voltage of said output node is lower than said first voltage,

a second differential amplifier that receives the voltage of said output node and a second voltage which is higher than said first voltage as input voltages, and activates its output signal when the voltage of said output node is higher than said second voltage, and

a first driving circuit that connects said output node to a high power supply line in response to the activation of the output signal of said first differential amplifier, and connects said output node to a low power supply line in response to the activation of the output signal of said second differential amplifier; and

said second voltage supply part includes

a third differential amplifier that receives the voltage of said output node and said first voltage as input voltages, and, only during an activation period of a drivability control signal, activates its output signal when the voltage of said output node is lower than said first voltage,

a fourth differential amplifier that receives the voltage of said output node and said second voltage as input voltages, and, only during the activation period of said drivability control signal, activates its output signal when the voltage of said output node is higher than said second voltage, and

a second driving circuit that connects said output node to said high power supply line in response to the activation of the output signal of said third differential amplifier, and connects said output node to said low power supply line in response to the activation of the output signal of said fourth differential amplifier, only during the activation period of said drivability control signal.

2. The voltage supply circuit according to claim 1, wherein:

said first driving circuit includes

a first transistor that is provided between said high power supply line and said output node, and receives the output signal of said first differential amplifier through its control terminal and

a second transistor that is provided between said low power supply line and said output node, and receives the output signal of said second differential amplifier through its control terminal; and

said second driving circuit includes

a third transistor that is provided between said high power supply line and said output node, and receives the output signal of said third differential amplifier through its control terminal,

a fourth transistor that is provided between said low power supply line and said output node, and receives the output signal of said fourth differential amplifier through its control terminal,

a fifth transistor that is provided between said high power supply line and said third transistor, and receives said drivability control signal through its control terminal, and

a sixth transistor that is provided between said low power supply line and said fourth transistor, and receives said drivability control signal through its control terminal.

3. A semiconductor memory comprising:

a plurality of memory cells;

a plurality of pairs of bit lines that are correspondingly connected to said memory cells;

a plurality of equalizing circuits that are provided to correspond to said pairs of bit lines;

a plurality of precharging circuits that are provided to correspond to said pairs of bit lines in order to connect said pairs of bit lines to a precharging voltage line;

a voltage supply circuit whose output node is connected to said precharging voltage line; and

a control circuit that activates a drivability control signal to said voltage supply circuit when a current to be supplied to said precharging voltage line by said voltage supply circuit needs to be increased, wherein said voltage supply circuit has first and second voltage supply parts that are provided in parallel with respect to said output node, in which

said first voltage supply part includes

a first differential amplifier that receives a voltage of said output node and a first voltage as input voltages, and activates its output signal when the voltage of said output node is lower than said first voltage,

a second differential amplifier that receives the voltage of said output node and a second voltage which is higher than said first voltage as input voltages, and activates its output signal when the voltage of said output node is higher than said second voltage, and

a first driving circuit that connects said output node to a high power supply line in response to the activation of the output signal of said first differential amplifier, and connects said output node to a low power supply line in response to the activation of the output signal of said second differential amplifier, and

said second voltage supply part includes

a third differential amplifier that receives the voltage of said output node and said first voltage as input voltages, and, only during the activation period of said drivability control signal, activates its output signal when the voltage of said output node is lower than said first voltage,

a fourth differential amplifier that receives the voltage of said output node and said second voltage as input voltages, and, only during the activation period of said drivability control signal, activates its output signal when the voltage of said output node is higher than said second voltage, and

a second driving circuit that connects said output node to said high power supply line in response to the activation of the output signal of said third differential amplifier, and connects said output node to said low power supply line in response to the activation of the output signal of said fourth differential amplifier, only during the activation period of said drivability control signal.