Circuit arrangement and method for compensating for abrupt signal level changes in amplification devices

• US 7,460,841 B2
• Filed: 08/29/2005
• Issued: 12/02/2008
• Est. Priority Date: 02/28/2003
• Status: Expired due to Fees

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Krug, Erwin, Pflaum, Bernd, Fischer, Frank, Klein, Horst
• Primary Examiner(s): Phu; Sanh D
• Application Number:
  US11/214,325
• Publication Number:
  US 20060194555A1
• Time in Patent Office: 1,191 Days
• Field of Search: 455/127.1, 455/127.2, 455/127.3, 455/250.1, 455/253.2, 455/241.1, 455/245.1, 455/246.1, 370/313, 370/252, 375/146, 375/147
• US Class Current: 455/127.1
• CPC Class Codes: H03G 3/001 Digital control of analog signals
• CPC Class Codes: H03G 3/3068 Circuits generating control signals for both R.F. and I.F. stages

Abstract

A circuit arrangement includes two adjustable amplification devices where the signal output of the first amplification device is connected to the signal input of the second amplification device. The first amplification device has a digital input for controlling its gain and the second amplification device has an input for controlling its gain. The input for gain control in the second amplification device is connected to the input for controlling the gain of the first amplification device via a means such that a change in the gain of the second amplification device in one direction is effected by a change in gain, brought about by means of the control, in the first amplification device in the opposite direction such that the total gain remains essentially the same.

Claims

1. A circuit arrangement, comprising:

first and second adjustable amplification devices, wherein a signal output of the first amplification device is coupled to a signal input of the second amplification device, and wherein the first amplification device comprises a digital control amplifier having a control input, and the second amplification device has a control input for controlling a gain thereof;

a control unit coupled to the control inputs of the first and second amplification devices, and configured to provide control signals thereto such that a change in the gain of the second amplification device in one direction is effected by a change in gain in the first amplification device in the opposite direction; and

a level detection device connected to the signal output of the first amplification device, and configured to perform a level comparison of the signal output with an upper and a lower limit value, and output a comparison signal at an output thereof, and provide the comparison signal to the control circuit.

2. The circuit arrangement of claim 1, wherein the second amplification device comprises an analog amplification device, and further comprising at least one digital-analog converter configured to convert a digital amplification control signal comprising a word length of n bits from the control unit into an analog amplification control voltage signal.

3. The circuit arrangement of claim 1, further comprising a frequency conversion circuit arranged between the first amplification device and the second amplification device.

4. The circuit arrangement of claim 3, further comprising a level detection device connected to the output of the frequency conversion device, and configured to compare the output signal to one or more prescribed values and output a comparison signal for evaluation by the control unit in response thereto.

5. The circuit arrangement of claim 1, further comprising a setting apparatus for controlling a gain, and configured to generate a gain control signal comprising n bits in order to set the gain, and wherein the control gain control signal is connected to the control input of the first amplification device.

6. The circuit arrangement of claim 5, wherein the setting apparatus comprises an input for receiving a control signal from the control circuit, and generating the gain control signal in response thereto.

7. The circuit arrangement of claim 1, wherein the control input of the first amplification device is configured to receive a control signal comprising a word length of n bits.

8. A receiver circuit, comprising:

a digital control adjustable amplifier configured to receive an analog input signal and generate a first amplified signal based on a digitally adjustable gain associated therewith;

a frequency converter device configured to receive the first amplified signal and generate a frequency converted signal;

an analog control adjustable amplifier configured to receive the frequency converted signal and generate a second amplified signal based on an analog adjustable gain associated therewith; and

a control unit configured to evaluate signal conditions of the receiver circuit and generate first and second control signals for the digital control adjustable amplifier and the analog control adjustable amplifier in response thereto, respectively, wherein the first control signal dictates a change in gain of the digital control adjustable amplifier in a first gain direction, and the second control signal dictates a change in gain of the analog control adjustable amplifier in a second, opposite direction, wherein the control unit comprises;

a level detector circuit configured to evaluate the first amplified signal or the frequency converted signal and generate an evaluation result signal in response thereto; and

a control circuit configured to receive the evaluate result signal and generate the first and second control signals in response thereto.

9. The receiver circuit of claim 8, wherein the control circuit comprises:

a pilot circuit configured to receive the evaluation result signal and generate an internal control signal in response thereto;

a setting apparatus configured to generate the first control signal in response to the internal control signal; and

a digital to analog converter configured to receive the first control signal and convert it to an analog signal, thereby generating the second control signal.

10. The receiver circuit of claim 9, further comprising a summation circuit configured to add a compensation component to the analog signal to form the second control signal.

11. The receiver circuit of claim 10, further comprising a compensation circuit configured to evaluate the output of the receiver circuit, and generate the compensation component in response thereto.

12. The receiver circuit of claim 9, wherein the pilot circuit is further configured to evaluate the second control signal and modify the internal control signal in response thereto.

13. A method for compensating for abrupt signal level changes in an amplification device, comprising:

applying a first digital actuating signal to a control input of a first digital control amplifier;

converting the first digital actuating signal into a second analog actuating signal, which is applied to a control input of a second amplification device;

wherein a change in the actuating signal at the control input of the first amplification device alters a gain thereof and prompts a change in a gain in the opposite direction at the input of the second amplification device such that the total gain of the two amplification devices remains essentially the same; and

comparing a level of the output signal from one or both amplification devices with an upper limit, a lower limit, or both, and altering the first and second actuating signals in response thereto.