Support of deep power savings mode and partial good in a thermal management system

• US 7,460,932 B2
• Filed: 06/21/2006
• Issued: 12/02/2008
• Est. Priority Date: 11/29/2005
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Johns, Charles Ray, Wang, Michael Fan
• Primary Examiner(s): Masinick; Michael D
• Application Number:
  US11/425,462
• Publication Number:
  US 20070124355A1
• Time in Patent Office: 895 Days
• Field of Search: 700/292, 700/299, 374/100, 374/116, 374/142, 374/163, 374/170, 361/93.8, 438/122, 438/308
• US Class Current: 700/299
• CPC Class Codes: G01K 3/005 Circuits arrangements for indicating a predetermined temperature fire detection G08B17/00
• CPC Class Codes: G01K 7/015 using microstructures, e.g. made of silicon
• CPC Class Codes: G06F 1/206 comprising thermal management
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A computer implemented method, data processing system, and processor are provided for managing a thermal management system. A determination is made as to whether a plurality of digital thermal sensors is faulty or functional. A power savings mode of at least one unit within the integrated circuit associated with the functional digital thermal sensor is monitored in response to at least one of the plurality of digital thermal sensors being functional. A functional digital thermal sensor is disabled in response to the at least one unit being in a power savings mode.

Claims

1. A computer implemented method for managing a thermal management system in an integrated circuit comprising:

determining if a plurality of digital thermal sensors is indicated as faulty or functional, wherein the determining step is performed by a thermal management control state machine residing within the integrated circuit, wherein the integrated circuit is a heterogeneous multi-core processor;

responsive to at least one of the plurality of digital thermal sensors being functional, monitoring a power savings mode of at least one unit within the integrated circuit associated with the functional digital thermal sensor, wherein the monitoring step is performed by the thermal management control state machine; and

responsive to the at least one unit being in a power savings mode, disabling the functional digital thermal sensor, wherein the disabling step is performed by the thermal management control state machine residing within the integrated circuit, wherein disabling the functional digital thermal sensor is performed by masking off the functional digital thermal sensor, and wherein the masking off comprises;

resetting a current temperature status register associated with the functional digital thermal sensor;

stopping communications between the status register and the functional digital thermal sensor; and

generating a signal to indicate the functional digital thermal sensor is currently masked and should not participate in thermal management tasks.

2. A processor, comprising:

an integrated circuit system;

at least one processing core;

a thermal management control state machine; and

a digital thermal sensor, wherein the processor executes the set of instructions to determine, using the state machine, if a plurality of digital thermal sensors is indicated as faulty or functional;

monitor, using the state machine, a power savings mode of at least one unit within the integrated circuit associated with the functional digital thermal sensor responsive to at least one of the plurality of digital thermal sensors being functional; and

disable, using the state machine, the functional digital thermal sensor in response to the at least one unit being in a power savings mode, wherein disabling the functional digital thermal sensor is performed by masking off the functional digital thermal sensor, and wherein the masking off comprises;

resetting a current temperature status register associated with the functional digital thermal sensor;

stopping communications between the status register and the functional digital thermal sensor; and

generating a signal to indicate the functional digital thermal sensor is currently masked and should not participate in thermal management tasks.

3. A computer implemented program embodied on a computer readable medium for managing a thermal management system in an integrated circuit, comprising:

instructions for determining if a plurality of digital thermal sensors is indicated as faulty or functional, wherein the determining step is performed by a thermal management control state machine residing within the integrated circuit, wherein the integrated circuit is a heterogeneous multi-core processor;

instructions for responsive to at least one of the plurality of digital thermal sensors being functional, monitoring a power savings mode of at least one unit within the integrated circuit associated with the functional digital thermal sensor, wherein the monitoring step is performed by the thermal management control state machine; and

instructions for responsive to the at least one unit being in a power savings mode, disabling the functional digital thermal sensor, wherein the disabling step is performed by the thermal management control state machine residing within the integrated circuit, wherein disabling the functional digital thermal sensor is performed by masking off the functional digital thermal sensor, and wherein the masking off comprises;

instructions for resetting a current temperature status register associated with the functional digital thermal sensor;

instructions for stopping communications between the status register and the functional digital thermal sensor; and

instructions for generating a signal to indicate the functional digital thermal sensor is currently masked and should not participate in thermal management tasks.