Method of treating and probing a via

• US 7,461,771 B2
• Filed: 04/22/2005
• Issued: 12/09/2008
• Est. Priority Date: 04/22/2005
• Status: Expired due to Fees

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Inventors: Leon, Alexander
• Primary Examiner(s): Ward; Jessica
• Assistant Examiner(s): Aboagye; Michael
• Application Number:
  US11/112,016
• Publication Number:
  US 20060237516A1
• Time in Patent Office: 1,327 Days
• Field of Search: 228/180.22, 228/39, 228/104, 228/103, 228/118, 228/56.3, 324/754, 361/767, 361/768, 361/769, 361/770, 361/771
• US Class Current: 228/180.22
• CPC Class Codes: G01R 1/07357 with flexible bodies, e.g. buckling beams
• CPC Class Codes: H05K 1/0268 for electrical inspection or testing
• CPC Class Codes: H05K 1/116 Lands, clearance holes or other lay-out details concerning the surrounding of a via
• CPC Class Codes: H05K 2203/043 Reflowing of solder coated conductors, not during connection of components, e.g. reflowing solder paste
• CPC Class Codes: H05K 2203/0465 Shape of solder, e.g. differing from spherical shape, different shapes due to different solder pads
• CPC Class Codes: H05K 2203/0545 Pattern for applying drops or paste; Applying a pattern made of drops or paste
• CPC Class Codes: H05K 2203/167 Using mechanical means for positioning, alignment or registration, e.g. using rod-in-hole alignment
• CPC Class Codes: H05K 3/1225 Screens or stencils; Holders therefor
• CPC Class Codes: H05K 3/3485 Applying solder paste, slurry or powder thick film methods for applying conductive paste or ink patterns H05K3/12

Abstract

A method of treating a via connected with a substrate and a method of probing the via are disclosed. A pattern of a lead-free solder paste is applied around a hole of the via without completely covering a pad of the via. The paste is reflowed to form a pattern of a lead-free solder on a pad that covers only a portion of a surface area of the pad and is positioned around the hole. The solder may be substantially symmetrically positioned around the hole. A flux generated during reflow is insufficient to plug the hole. The lead-free solder can be probed by a blade probe including colinear first and second edges and having a preferred orientation relative to the pattern of the lead-free solder.

Claims

1. A method of treating a via connected with a substrate, comprising:

aligning a stencil with the substrate, the stencil including a pattern with a plurality of apertures and a shield;

connecting the stencil with the substrate so that the shield covers a hole and a first portion of a pad of the via, and the apertures are positioned over a second portion of the pad;

applying a lead-free solder paste to the stencil to print the paste directly upon the second portion only, the shield preventing the paste from entering the hole;

removing the stencil from the substrate; and

reflowing the paste so that a flux drains through the hole and separate sections of lead-free solder are positioned around the hole directly upon the pad and wet only a portion of a surface area of the pad, the hole remaining unobstructed, the separate sections of lead-free solder exposed to receive an electrical test probe.

2. The method as set forth in claim 1, wherein during the applying, an edge of the aperture is aligned with a rim of the hole of the via.

3. The method as set forth in claim 1, wherein after the applying, a portion of the lead-free solder paste abuts with a rim of the hole of the via.

4. The method as set forth in claim 1, wherein after the reflowing, the lead-free solder comprises two separate sections of the lead-free solder that are positioned around the hole.

5. The method as set forth in claim 4, wherein the lead-free solder is substantially symmetrically positioned on opposite sides of the hole.

6. The method as set forth in claim 5, wherein the lead-free solder on the pad forms a butterfly pattern.

7. The method as set forth in claim 1, wherein the applying comprises a pasting of the pad on a side of the via that the via will be probed from.

8. The method as set forth in claim 1, wherein the apertures are symmetrically positioned about the shield.

9. The method as set forth in claim 1, wherein the apertures include a shape selected from the group consisting of a rectangular shape, an arcuate shape, an angular shape, and a complex shape.

10. The method as set forth in claim 1, wherein the shield includes a shape selected from the group consisting of a rectangular shape, an arcuate shape, an angular shape, and a complex shape.

11. A via treated with a lead-free solder according to the method as set forth in claim 1.

12. The method as set forth in claim 1 and further comprising after the reflowing:

aligning a test fixture with the substrate;

the test fixture including a blade probe connected with the test fixture in a preferred orientation, the blade probe including a shaft and a blade connected with the shaft, the blade including a tip, a first edge, a second edge, the first and second edges are colinear with each other; and

the preferred orientation and the aligning are operative to position the first and second edges to make a contact with a portion of the separate sections of lead-free solder; and

probing the via by urging the blade probe into contact with one or more of the separate sections of lead-free solder above the hole.

13. The method as set forth in claim 12, wherein the preferred orientation of the blade probe and the aligning of the test fixture with the substrate operatively position the first edge and second edges in a substantially orthogonal orientation with an axis of the lead-free solder.

14. The method as set forth in claim 12, wherein during the probing, the tip and a portion of the first and second edges are positioned in the hole of the via.

15. The method as set forth in claim 12, wherein the probing comprises an in-circuit-test process.

16. A method of treating a via to provide a plurality of electrical evaluation contact points, the via having a hole and a pad circumferentially about the hole and exposed upon a substrate;

comprising;

providing a stencil having a plurality of apertures and a shield, the shield and apertures structured and arranged to cover the hole and first portions of the pad and to define exposed second portions of the pad that abut the hole;

applying a lead-free solder paste to the stencil to print the paste directly upon only the exposed second portions of the pad, the shield preventing the paste from entering the hole or pasting to the covered first portions;

removing the stencil from the substrate; and

reflowing the paste to provide a plurality of separate lead-free solder sections directly upon the pad and abutting the hole, the separate sections exposed and rising from the pad to receive an electrical test probe, the hole and separate solder sections remaining unobstructed.

17. The method as set forth in claim 16 and further comprising after the reflowing:

aligning a test fixture with the substrate,

the test fixture including a blade probe connected with the test fixture in a preferred orientation, the blade probe including a shaft and a blade connected with the shaft, the blade including a tip, a first edge, a second edge, the first and second edges are colinear with each other, and

the preferred orientation and the aligning are operative to position the first and second edges to make a contact with a portion of the separate sections of lead-free solder; and

probing the via by urging the blade probe into contact with one or more separate sections of the lead-free solder.

18. The method as set forth in claim 16, wherein after the reflowing, the lead-free solder comprises two separate sections of the lead-free solder that are positioned around the hole.