Method for low temperature annealing of metallization micro-structures in the production of a microelectronic device

• US 7,462,269 B2
• Filed: 06/20/2001
• Issued: 12/09/2008
• Est. Priority Date: 02/04/1998
• Status: Expired due to Fees

• Current Assignee: Semitool Incorporated (Applied Materials Incorporated)
• Original Assignee: Semitool Incorporated (Applied Materials Incorporated)
• Inventors: Ritzdorf, Thomas L., Dundas, Curt, Stevens, E. Henry, Graham, Lyndon W., Chen, LinLin
• Primary Examiner(s): Tsang-Foster; Susy N
• Assistant Examiner(s): Leader; William T
• Application Number:
  US09/885,451
• Publication Number:
  US 20020074233A1
• Time in Patent Office: 2,729 Days
• Field of Search: 205/102, 205/123, 205/157, 205/182, 205/224
• US Class Current: 205/102
• CPC Class Codes: C25D 17/001 Apparatus specially adapted for electrolytic coating of wafers, e.g. semiconductors or solar cells
• CPC Class Codes: C25D 5/022 using masking means
• CPC Class Codes: C25D 5/50 by heat-treatment
• CPC Class Codes: C25D 7/123 Semiconductors first coated with a seed layer or a conductive layer
• CPC Class Codes: H01L 21/2885 using an external electrical current, i.e. electro-deposition
• CPC Class Codes: H01L 21/67173 in-line arrangement
• CPC Class Codes: H01L 21/6723 comprising at least one plating chamber electroless plating apparatuses C23C, electroplating apparatuses C25D
• CPC Class Codes: H01L 21/76838 characterised by the formation and the after-treatment of the conductors etching for patterning the conductors H01L21/3213
• CPC Class Codes: H01L 21/76877 Filling of holes, grooves or trenches, e.g. vias, with conductive material
• CPC Class Codes: H01L 21/76883 Post-treatment or after-treatment of the conductive material

Abstract

A method for filling recessed microstructures at a surface of a microelectronic workpiece, such as a semiconductor wafer, with metallization is set forth. In accordance with the method, a metal layer is deposited into the microstructures with a process, such as an electroplating process, that generates metal grains that are sufficiently small so as to substantially fill the recessed microstructures. The deposited metal is subsequently subjected to an annealing process at a temperature below about 100 degrees Celsius, and may even take place at ambient room temperature to allow grain growth which provides optimal electrical properties. Various novel apparatus for executing unique annealing processes are also set forth.

Claims

1. A process for electrochemical deposition of copper onto a surface of a semiconductor workpiece in a plating tool, comprising:

providing a workpiece having a dielectric layer in which recesses have been formed, a barrier layer on the dielectric layer, and a copper seed layer deposited separately on the barrier layer;

exposing a surface of the workpiece to a plating solution in a plating chamber in the tool, the plating solution including a principal metal species comprising copper to be deposited;

applying plating power between the surface of the workpiece and an electrode electrically coupled to the plating solution to electrolytically deposit copper onto the seed layer and into the recesses, wherein plating power is applied

at a first current density for a first period of time to deposit a first amount of copper into the recesses, and subsequently

at a second current density for a second period of time to deposit a second amount of copper onto the first amount of copper to fill the recesses with copper and form a copper overburden extending over the dielectric layer, wherein the second current density is greater than the first current density and a majority of the copper deposited onto the surface of the workpiece is deposited during the second time period, and wherein the second amount of copper has relatively small grain sizes; and

annealing the copper in the recesses and the copper overburden portion at a predetermined elevated temperature in an annealing process after filling the recesses with the copper and before subsequent chemical mechanical polishing processes to increase the grain size of the copper such that the conductivity of the deposited copper increases and electromigration resistance increases, wherein the annealing procedure produces a temperature gradient through a cross-section of the workpiece by applying heat at a backside of the workpiece and removing heat from an upper surface of the deposited copper.

2. The process of claim 1, wherein the first current density and first period of time are selected to at least partially fill the recesses with the deposited metal.

3. The process of claim 1, wherein copper deposited during the first time period has a grain size that is sufficiently small to fill the recesses and at least some of the recesses have a width of less than or equal to 0.3 micron.

4. The process of claim 1, wherein the metal is annealed at a temperature of below about 250°

C.

5. The process of claim 1, wherein the first current density is about 3.2 mA/cm2.

6. The process of claim 1, wherein the second current density is about 20 mA/cm2.

7. The process of claim 1, wherein a ratio of the second current density to the first current density is about 6:

1.

8. The process of claim 1, wherein the first time period is about 30 seconds.

9. The process of claim 1, wherein the metal is annealed at a temperature of below about 300°

C.

10. The process of claim 1, wherein metal is deposited at a higher rate during the second time period than during the first time period.

11. A process for electrochemical deposition of copper onto a surface of a semiconductor workpiece having a dielectric layer, submicron recesses in the dielectric layer, a barrier layer on the dielectric layer, and a copper seed layer deposited separately on the barrier layer, the process comprising:

exposing a surface of the workpiece to a plating solution in a plating chamber in a tool, the plating solution including copper as a principal metal species to be deposited;

applying plating power between the surface of the workpiece and an electrode electrically coupled to the plating solution to electrolytically deposit copper onto the surface, wherein plating power is applied

at a first current density for a first period of time to deposit a first amount of copper onto the surface of the workpiece, and subsequently

at a second current density for a second period of time to deposit a second amount of copper onto the first amount of copper such that the second amount of copper fills the recesses and forms a copper overburden extending over the dielectric layer, wherein the second current density is greater than the first current density and a majority of copper deposited onto the surface of the workpiece is deposited during the second time period; and

annealing the copper in the recesses and the copper overburden at a predetermined temperature that is below about 300°

C., wherein the annealing process occurs after plating copper into the recesses and before subsequent chemical mechanical polishing processes to increase the grain size of the copper such that the conductivity of the deposited copper increases and electromigration resistance increases, and wherein the annealing procedure produces a temperature gradient through a cross-section of the workpiece by applying heat at a backside of the workpiece and removing heat from an upper surface of the deposited copper.

12. The process of claim 11, wherein the second current density is applied immediately after the first period of time.

13. A process for electrochemical deposition of metal onto a surface of a semiconductor workpiece, the surface defining a plurality of recessed microstructures, the workpiece including at least one low K dielectric layer, recesses in the low-K dielectric layer, a barrier layer on the low-K dielectric layer, and a copper seed layer deposited separately on the barrier layer, the process comprising:

exposing a surface of the workpiece to a plating solution in a chamber in a tool, the plating solution including a principal metal species to be deposited, wherein the principal metal species to be deposited comprises copper;

applying plating power between the surface of the workpiece and an electrode electrically coupled to the plating solution to electrolytically deposit metal onto the surface, wherein plating power is applied

at a first current density for a first period of time to deposit a first layer of the metal onto the surface of the workpiece to at least partially fill the recessed microstructures, and subsequently

at a second current density for a second period of time to deposit a second layer of the metal onto the first layer of metal such that the second layer fills the recesses and forms a copper overburden over the low-K dielectric layer, wherein the second current density is greater than the first current density; and

annealing the copper in the recesses and the copper overburden portion at a predetermined temperature that is below a temperature at which the low K dielectric layer would substantially degrade, wherein the annealing process occurs after plating copper into the recesses and before subsequent chemical mechanical polishing processes to increase the grain size of the copper such that the conductivity of the deposited copper increases and electromigration resistance increases, and wherein the annealing procedure produces a temperature gradient through a cross-section of the workpiece by applying heat at a backside of the workpiece and removing heat from an upper surface of the deposited copper.

14. The process of claim 13, wherein the second current density is applied immediately after the first period of time has elapsed.

15. A process for electrochemical deposition of metal onto a surface of a semiconductor workpiece having a dielectric layer, recesses in the dielectric layer, and a barrier layer on the dielectric layer, the process comprising:

applying a metal seed layer separately onto the barrier layer;

exposing the surface of the workpiece to a plating solution in a chamber of a tool, the plating solution including a principal metal species to be deposited, wherein the principal metal species to be deposited comprises copper;

applying plating power between the surface of the workpiece and an anode electrically coupled to the plating solution to electrolytically deposit copper into the recesses, wherein plating power is applied

at a first current density for a first period of time to deposit a first amount of copper onto the seed layer, and subsequently

at a second current density for a second period of time to deposit a second amount of copper onto the first amount of copper such that the second amount of copper fills the recesses and forms a copper overburden extending over the dielectric layer, wherein the second current density is greater than the first current density; and

annealing the copper in the recesses and the copper overburden portion in an elevated temperature annealing process at a predetermined temperature, wherein the annealing process occurs after plating copper into the recesses and before subsequent chemical mechanical polishing processes to increase the grain size of the copper such that the conductivity of the deposited copper increases and electromigration resistance increases, and wherein the annealing procedure produces a temperature gradient through a cross-section of the workpiece by applying heat at a backside of the workpiece and removing heat from an upper surface of the deposited copper.

16. A method of depositing a metal layer on a semiconductor wafer having a dielectric layer, recesses in the dielectric layer, and a barrier layer on the dielectric layer, the method comprising:

depositing a seed layer separately on the barrier layer;

immersing the wafer in an electrolytic solution containing metal ions, wherein the metal ions comprise copper, and wherein the electrolytic solution is in a chamber of a tool;

electrolytically depositing a first plated copper layer on the wafer by applying current at a first current density between the wafer and the solution;

after a first period of time during which the first plated copper layer has been formed, increasing the applied current to a second current density greater than the first current density to plate additional copper onto the first plated copper layer such that the additional copper fills the recesses and forms a copper overburden extending over the dielectric layer; and

annealing the copper in the recesses and the copper overburden in an elevated temperature annealing process at a predetermined temperature, wherein the annealing process occurs after plating copper into the recesses and before subsequent chemical mechanical polishing processes to increase the grain size of the copper such that the conductivity of the deposited copper increases and electromigration resistance increases, and wherein the annealing procedure produces a temperature gradient through a cross-section of the workpiece by applying heat at a backside of the workpiece and removing heat from an upper surface of the deposited copper.

17. The process of claim 16, wherein the surface of the wafer defines a plurality of recessed microstructures, and the first current density and first period of time are selected to at least partially fill the recessed microstructures with the deposited metal.

18. The process of claim 16, wherein metal deposited during the first time period has a grain size that is sufficiently small to fill the recessed microstructures and at least some of the recessed microstructures have a width of less than or equal to 0.3 micron.

19. The process of claim 16, wherein the metal is annealed at a temperature of below about 250°

C.

20. The process of claim 16, wherein the first current density is about 3.2 mA/cm2.

21. The process of claim 16, wherein the second current density is about 20 mA/cm2.

22. The process of claim 16, wherein the first time period is about 30 seconds.

23. The process of claim 16, wherein the metal is annealed at a temperature of below about 300°

C.

24. The process of claim 16, wherein metal is deposited at a higher rate during the second time period than during the first time period.

25. A process for electrochemical deposition of copper onto a surface of a semiconductor workpiece in a plating tool, comprising:

providing a workpiece having a dielectric layer in which sub-micron recesses have been formed, a barrier layer on the dielectric layer, and a copper seed layer deposited separately on the barrier layer;

electrolytically depositing copper onto the seed layer and into the recesses by applying a plating power at a first current density for a first period of time to deposit a first amount of copper into the recesses and subsequently applying plating power at a second current density higher than the first current density for a second period of time to deposit a second amount of copper that fills the recesses with copper and forms a copper overburden portion extending over the dielectric layer, wherein the electrolytically deposited copper has grain sizes substantially less than cross-sectional dimensions of the sub-micron recesses such that the electrolytically deposited copper has a high initial resistivity; and

annealing the copper in the recesses and in the copper overburden portion at an elevated temperature in an annealing process after depositing the second copper, but before removing the copper overburden portion, to increase grain sizes of the copper such that the resistivity of the electrolytically deposited copper decreases and the electromigration resistance increases, wherein the annealing procedure produces a temperature gradient through a cross-section of the workpiece by applying heat at a backside of the workpiece and removing heat from an upper surface of the deposited copper.

26. The process of claim 25, further comprising removing the copper overburden portion from the workpiece by a chemical mechanical polishing process after annealing the electrolytically deposited copper.

27. The process of claim 26, further comprising capping the copper in the recesses after removing the copper overburden portion.

28. The process of claim 25 wherein the initial sheet resistance of the electrolytically deposited copper is at least approximately 12.7 mOhms/sq.

29. The process of claim 28, further comprising removing the copper overburden portion using a chemical mechanical polishing process after annealing the electrolytically deposited copper.

30. The process of claim 28, further comprising capping the copper in the recesses after removing the copper overburden portion.

31. The process of claim 25 wherein applying heat comprises transferring heat via a hot plate to the backside of the workpiece and removing heat comprises directing a flow of gas across the surface of the deposited copper.

32. The process of claim 25 wherein applying heat comprises radiant heating of the backside of the workpiece and removing heat comprises directing a flow of gas across the upper surface of the deposited copper.

33. The process of claim 25 wherein removing heat comprises transferring heat from the upper surface of the deposited copper to a heat sink.