Phase and frequency drift and jitter compensation in a distributed telecommunications switch

• US 7,463,626 B2
• Filed: 05/24/2002
• Issued: 12/09/2008
• Est. Priority Date: 11/21/2000
• Status: Expired due to Term

• Current Assignee: F Poszat Hu LLC (Intellectual Ventures LLC), Transwitch Corporation
• Original Assignee: Transwitch Corporation
• Inventors: Toebes, David K., Renault, Michael M., Benoit, Steven E., Zhovnirovsky, Igor, Roy, Subhash C.
• Primary Examiner(s): Nguyen, Brian D
• Application Number:
  US10/155,517
• Publication Number:
  US 20030091035A1
• Time in Patent Office: 2,391 Days
• Field of Search: 370/352, 370/353, 370/400, 370/401, 370/386, 370/387, 370/388, 370/389, 370/395.1, 370/396, 370/395.7, 370/462, 370/463, 370/395.21, 370/503, 370/507, 370/516, 370/518, 370/522, 370/395.42
• US Class Current: 370/388
• CPC Class Codes: H04J 2203/0025 Peripheral units
• CPC Class Codes: H04J 2203/0026 Physical details
• CPC Class Codes: H04J 3/0682 by delay compensation, e.g. by compensation of propagation delay or variations thereof, by ranging
• CPC Class Codes: H04J 3/0685 Clock or time synchronisation in a node; Intranode synchronisation
• CPC Class Codes: H04J 3/0688 Change of the master or reference, e.g. take-over or failure of the master
• CPC Class Codes: H04L 12/6402 Hybrid switching fabrics
• CPC Class Codes: H04L 2012/6413 Switch peripheries
• CPC Class Codes: H04L 7/10 Arrangements for initial synchronisation

Abstract

Methods and apparatus for phase and frequency drift and jitter compensation in a distributed switch which carries both TDM and packet data are disclosed. The methods include the insertion of programmable fill times at different stages of the switch to allow buffers to fill, driving service processors (line cards) with different clocks and synchronizing the service processors (line cards) to the switch fabric, providing redundant switch fabric clocks and methods for automatically substituting one of the redundant clocks for a clock which fails, providing redundant switch fabrics each having a different clock and methods for automatically substituting one switch fabric for the other when one fails. The apparatus of the invention includes a plurality of service processors (line cards), switch elements and clock generators. An exemplary clock generator based on an FPGA is also disclosed.

Claims

1. A method for arbitrating bandwidth in a communications switch, comprising:

generating a repeating data frame having a plurality of rows;

making requests during row N for space in row N+1, where N is an integer;

buffering a predetermined number of requests; and

granting one or more of the buffered requests based on priority.

2. A method according to claim 1, wherein:

said buffering the predetermined number of requests comprises buffering a predetermined even number of requests.

3. A method according to claim 1, wherein:

x bits of requests are interleaved with y bits of data, where x and y are integers, and said buffering the predetermined number of requests includes setting a buffer fill time to a multiple of x+y bits.

4. A method according to claim 1, wherein:

the switch is a multistage switch, and

said buffering the predetermined number of requests is performed at each stage of the switch.

5. A method according to claim 4, wherein:

the same number of requests are buffered at each stage of the switch.

6. A system comprising:

a first service processor to generate a repeating data frame having a plurality of rows;

a switch fabric coupled with the first service processor and having a first switch element configured

to receive at least a portion of the repeating data frame,

to buffer, for a predetermined period of time, one or more request elements of the received portion of the repeating data frame, and

to transmit at least a first request element of the one or more buffered request elements based at least in part on a priority of the first request element, wherein the first request element is in row N of the plurality of rows, where N is an integer, and requests an allocation for row N+1; and

a second service processor coupled with the switch fabric to receive at least the first request element from the switch fabric, to generate a grant based at least in part on the first request element, and to transmit the grant to the first service processor through the switch fabric.

7. The system of claim 6, wherein the predetermined period of time is based at least in part on an electrical distance between the first service processor and the second service processor.