Shared network-interface controller (NIC) using advanced switching (AS) turn-pool routing field to select from among multiple contexts for multiple processors

• US 7,464,174 B1
• Filed: 03/07/2005
• Issued: 12/09/2008
• Est. Priority Date: 03/07/2005
• Status: Expired due to Fees

• Current Assignee: Diodes Incorporated
• Original Assignee: Pericom Semiconductor Corporation (Diodes Incorporated)
• Inventors: Ngai, Henry P.
• Primary Examiner(s): Barot; Bharat N
• Application Number:
  US10/906,783
• Time in Patent Office: 1,373 Days
• Field of Search: 709232-234, 709238-242, 709/250, 719/311, 719/328, 370351-356, 370466-469
• US Class Current: 709/234
• CPC Class Codes: H04L 12/4625 Single bridge functionality, e.g. connection of two networks over a single bridge
• CPC Class Codes: H04L 49/35 Switches specially adapted for specific applications

Abstract

A network connection is transparently shared among two or more processors. A shared network interface controller (NIC) has two or more sets of context registers that may include Ethernet command and pointer registers. Each set of context registers is accessed by a different processor. The processors are separated from the shared NIC by an Advanced Switching (AS) network. AS packets to write the context registers are embedded in AS packets that contain turnpool information that specifies a route through the AS network. Turnpools for AS packets from the different processors are unique and used to indicate which set of context registers to access. Each turnpool-identified context is assigned a different external network (Ethernet) address. External packets received by the shared NIC from the external network are sent inside AS packets over the AS network to the correct processor by associating the packet'"'"'s external network address with a turnpool-context.

Claims

1. A shared network interface controller (NIC) comprising:

an external-network connection that sends external packets and receives external packets over an external network using an external-network protocol;

a local network connection for sending and receiving local packets to and from a first processor and to and from a second processor on a local network using a local-network protocol;

wherein the local packets include a routing specifier that specifies a route through the local network;

a protocol converter for embedding data from external packets received from the external network inside local packets sent over the local network;

a first set of registers that include a first command register to command transmission of an external packet that contains data from the first processor and a first transmit-pointer register for locating data to transmit in the external packet and a first receive-pointer register for indicating a location to store data from external packets received;

wherein local packets from the first processor received by the local network connection of the shared NIC have a first routing value of the routing specifier that specifies a first route between the first processor and the shared NIC;

a second set of registers that include a second command register to command transmission of an external packet that contains data from the second processor and a second transmit-pointer register for locating data to transmit in the external packet and a second receive-pointer register for indicating a location to store data from external packets received;

wherein local packets from the second processor received by the local network connection of the shared NIC have a second routing value of the routing specifier that specifies a second route between the second processor and the shared NIC;

wherein the first routing value and the second routing value are different values; and

a context controller that selects the first set of registers for access in response to the local packets when the local packets contain the first routing value;

the context controller selecting the second set of registers for access in response to the local packets when the local packets contain the second routing value,

whereby the external network connection is shared by the first and second processors and the first and second set of registers are selected for access by the first or second routing values for the local network.

2. The shared network interface controller (NIC) of claim 1 wherein the external packets received by the external-network connection have as a destination address a first external-network address or a second external-network address;

further comprising;

a first context association that associates access of the first set of registers with the first routing value and with the first external-network address;

a second context association that associates access of the second set of registers with the second routing value and with the second external-network address;

wherein the first set of registers is accessed by local packets from the first processor and when receiving external packets having the first external-network address as the destination address;

wherein the second set of registers is accessed by local packets from the second processor and when receiving external packets having the second external-network address as the destination address.

3. The shared network interface controller (NIC) of claim 2 further comprising:

a context table having association entries that associate routing values with external-network addresses and register sets;

a first entry in the context table containing the first context association of the first routing value with the first external-network address and access of the first set of registers; and

a second entry in the context table containing the second context association of the second routing value with the second external-network address and access of the second set of registers.

4. The shared network interface controller (NIC) of claim 2 wherein the external network is an Ethernet and the first and second external-network addresses are media-access controller (MAC) addresses.

5. The shared network interface controller (NIC) of claim 2 wherein local packets do not contain an endpoint address uniquely indicating the first processor, the second processor, or the shared NIC;

wherein local packets contain only routing values to determine routes through the local network.

6. The shared network interface controller (NIC) of claim 5 wherein the local network is an Advanced Switching (AS) network;

wherein the first routing value is a first turnpool indicating the first route between the first processor and the shared NIC

wherein the second routing value is a second turnpool indicating the second route between the second processor and the shared NIC.

7. The shared network interface controller (NIC) of claim 6 wherein the first and second turnpool each comprise a series of switch values, each switch value indicating a number of ports to skip over between an ingress port and an egress port of a switch in the local network.

8. The shared network interface controller (NIC) of claim 2 wherein the first processor writes to a first local address to write to the first set of registers;

wherein the second processor writes to a second local address to write to the second set of registers;

wherein the first local address and the second local address have a same numerical value;

whereby processors transparently write to the first and second set of registers on the shared NIC using a same local address.

9. The shared network interface controller (NIC) of claim 2 wherein the local packets are AS packets that encapsulate Peripheral Component Interconnect express (PCIE) packets that have fragments of external packets sent over the external network as PCIE data payloads.

10. The shared network interface controller (NIC) of claim 2 further comprising:

a transmit bus-mastering engine, receiving the first transmit-pointer register and generating local packets with the first routing value to fetch first data from a first memory for the first processor, the transmit bus-mastering engine sending the first data to the external-network connection for transmission in external packets with the first external-network address;

the transmit bus-mastering engine also receiving the second transmit-pointer register and generating local packets with the second routing value to fetch second data from a second memory for the second processor, the transmit bus-mastering engine sending the second data to the external-network connection for transmission in external packets with the second external-network address.

11. The shared network interface controller (NIC) of claim 10 further comprising:

an arbiter, coupled to the context controller, for arbitrating use of the transmit bus-mastering engine between the first and second processors when the first processor writes a transmit command to the first command register at about a same time as the second processor writes a transmit command to the second command register.

12. A method for sharing a network connection comprising:

transmitting external packets by;

receiving from an inter-processor network a processor packet from a processor, the processor packet having a source-routing field that indicates a route through the inter-processor network;

selecting as a selected register set a first register set when the source-routing field identifies a first route from a first processor, or a second register set when the source-routing field identifies a second route from a second processor;

writing to the selected register set in response to a data payload in the processor packet;

when a transmit command is written to the selected register set, reading a transmit pointer from the selected register set, and fetching transmit data located by using the transmit pointer to form transmit packets;

finding an external network address associated with the selected register set and including the external network address in the transmit packets as a source address;

transmitting the transmit packets over an external network connection that is external to the inter-processor network;

receiving external packets by;

receiving from the external network connection receive packets that contain a received external network address;

searching for a matching register set that is associated with the received external network addresses;

reading a receive pointer from the matching register set; and

writing received data from the receive packets to a location indicated by the receive pointer by encapsulating the received data and the receive pointer inside processor packets that have a source-routing field associated with the matching register set;

wherein each register set is associated with a different source-routing field and a different received external network address,

whereby source routing fields and external network addresses are associated with registers sets for different processors on the inter-processor network.

13. The method of claim 12 wherein fetching transmit data located by using the transmit pointer comprises:

when the selected register set is the first register set, sending processor packets that contain the transmit pointer to the first processor, the processor packets containing a source-routing field that specifies the first route;

when the selected register set is the second register set, sending processor packets that contain the transmit pointer to the second processor, the processor packets containing a source-routing field that specifies the second route.

14. The method of claim 13 further comprising:

when an initial processor packet is received from a new processor on the inter-processor network, extracting a new source-routing field;

detecting a new processor by finding no register set associated with the new source-routing field;

associating an unused register set with the new source-routing field;

assigning a new external network address for associating with the unused register set; and

writing to the unused register set in response to a data payload in the initial processor packet.

15. The method of claim 12 wherein the source-routing field contains a turnpool with switch values that each indicate a number of switch ports to skip over between an ingress port and an egress port on a switch along a route taken through the inter-processor network.

16. The method of claim 12 wherein the inter-processor network is an Advanced Switching (AS) network and the external network connection is a connection to an Ethernet, a token-ring network, or an Internet.

17. A shared peripheral comprising:

local network means for sending and receiving local packets over a local network to and from a first processor and to and from a second processor;

routing extraction means for reading a routing value from local packets received by the local network means over the local network;

search means, coupled to the routing extraction means, for searching for a matching association having a stored routing value that matches the routing value received;

a plurality of register sets, each register set for access by a different processor on the local network;

context controller means, coupled to the search means, for selecting a selected registers set in the plurality of register sets in response to the matching association;

arbitration means for arbitrating operation control of a peripheral device in response to peripheral commands written to the plurality of registers sets; and

reply means, responsive to operation of the peripheral device by a selected association, for generating reply local packets to a selected processor on the local network, the reply local packets having a selected routing value associated with the selected association, the selected routing value specifying a route through the local network to the selected processor,

whereby use of the peripheral device is shared by processors identified by routing values for routes to the processors through the local network.

18. The shared peripheral of claim 17 wherein the routing value contains a turnpool with switch values that each indicate a number of switch ports to skip over between an ingress port and an egress port on a switch along a route taken through the local network between the shared peripheral and a processor.

19. The shared peripheral of claim 18 wherein the local network is an Advanced Switching (AS) network.

20. The shared peripheral of claim 19 wherein the peripheral device is

a network interface controller (NIC) allowing processors on the local network to share an external network connection;

or

a display adapter allowing two or more processors to update a display by writing to separate register sets;

or

a storage unit for storing shared data from two or more processors that write to separate register sets to access the shared data.