Method and apparatus for adjusting the voltage and frequency to minimize power dissipation in a multiprocessor system in response to compute load

• US 7,464,276 B2
• Filed: 09/19/2006
• Issued: 12/09/2008
• Est. Priority Date: 09/28/2001
• Status: Expired due to Fees

• Current Assignee: Sony Corporation Of America (Sony Group Corp.)
• Original Assignee: Intel Corporation
• Inventors: Ayers, David J., Rusu, Stefan, Burns, James S.
• Primary Examiner(s): Patel; Nitin C
• Application Number:
  US11/524,220
• Publication Number:
  US 20070016814A1
• Time in Patent Office: 812 Days
• Field of Search: 713/300, 713/320, 713/322, 713/323, 713/324, 713/330, 713/340
• US Class Current: 713/300
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/324 by lowering clock frequency
• CPC Class Codes: G06F 1/3296 by lowering the supply or operating voltage
• CPC Class Codes: H04B 17/10 of transmitters
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A method for adjusting the voltage and frequency to minimize power dissipation in a processor. The method of one embodiment comprises determining a power consumption value. The power consumption value is evaluated to obtain a new operating point. The new operating point is compared with a present operating point. A frequency setting and a voltage setting are adjusted to correspond to the new operating point if the new operating point is different from the present operating point.

Claims

1. A method comprising:

determining a power consumption value of a processor by obtaining a compute load of said processor;

evaluating said power consumption value to obtain a new operating point;

comparing said new operating point with a present operating point; and

adjusting a frequency setting and a voltage setting to correspond to said new operating point if said new operating point is different from said present operating point, the power consumption being controlled based on the obtained compute load.

2. The method of claim 1 wherein determining a power consumption value further comprises querying a sensor.

3. The method of claim 2 wherein said sensor is to obtain a current value indicating how much current is being consumed.

4. The method of claim 3 wherein said current value is used to calculate the power consumption value.

5. The method of claim 1 wherein said evaluating further comprises querying for system and user inputs, said user inputs to override said power consumption value and to affect choosing of said new operating point.

6. The method of claim 1 wherein said evaluating further comprises using said power consumption value to look up a frequency setting and a voltage setting for said new operating point in said frequency and voltage data.

7. The method of claim 6 wherein said adjusting further comprises outputting said frequency setting and said voltage setting to a control register, said frequency setting to adjust signal output of a clock generator and said voltage setting to adjust voltage output of a power supply.

8. The method of claim 7 wherein said evaluating further comprises determining whether said power consumption value is within an allowable range.

9. The method of claim 8 wherein said new operating point is chosen to have a new power consumption value within said allowable range.

10. The method of claim 2 wherein said sensor monitors compute load.

11. A processor comprising:

a controller to adjust the processor voltage and processor frequency;

a sensor coupled to said controller, said sensor to measure power consumption of said processor based on a compute load of said processor, the controller to control the power consumption based on the compute load;

a memory coupled to said controller, said memory to store a plurality of frequency and voltage settings corresponding to particular operating points; and

a control register coupled to said controller, said control register to receive a frequency setting and a voltage setting from said controller.

12. The processor of claim 11 wherein said control register is to drive said frequency setting to a clock generator, said frequency setting to adjust a clock signal output of said clock generator.

13. The processor of claim 12 further wherein said control register is to drive said voltage setting to a power supply coupled to said processor, said voltage setting to adjust a voltage output of said power supply.

14. The processor of claim 13 further comprising a hardware pin coupled to said controller, said pin to provide a hardware interrupt signal to alter operation of said controller.

15. The processor of claim 14 further comprising software registers to receive software inputs to said controller, said software inputs to provide for software control of said controller and to alter operation of said controller.

16. The processor of claim 15 wherein said memory is a fused array storing a table of data comprising of settings for frequency and voltage pairs corresponding to said particular operating points.

17. The processor of claim 16 wherein said controller comprises logic to evaluate said power consumption values and to select a new operating point and to determine whether to change present operating point of said processor to said new operating point.

18. The processor of claim 17 wherein said present operating point comprises a first frequency setting and a first voltage setting, and said new operating point comprises a second frequency setting and a second voltage setting.

19. The processor of claim 18 wherein said controller comprises logic to output said second frequency setting and said second voltage setting to said control register.